Yici Cai

2.8k total citations
220 papers, 1.7k citations indexed

About

Yici Cai is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, Yici Cai has authored 220 papers receiving a total of 1.7k indexed citations (citations by other indexed papers that have themselves been cited), including 197 papers in Electrical and Electronic Engineering, 128 papers in Hardware and Architecture and 27 papers in Computer Networks and Communications. Recurrent topics in Yici Cai's work include VLSI and FPGA Design Techniques (142 papers), Low-power high-performance VLSI design (99 papers) and VLSI and Analog Circuit Testing (76 papers). Yici Cai is often cited by papers focused on VLSI and FPGA Design Techniques (142 papers), Low-power high-performance VLSI design (99 papers) and VLSI and Analog Circuit Testing (76 papers). Yici Cai collaborates with scholars based in China, United States and Hong Kong. Yici Cai's co-authors include Xianlong Hong, Qiang Zhou, Qiang Zhou, Sheldon X.-D. Tan, Hailong Yao, Jianlei Yang, Jun Gu, Zuowei Li, Jiang Hu and Gang Qu and has published in prestigious journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Circuits and Systems I Regular Papers and IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

In The Last Decade

Yici Cai

205 papers receiving 1.6k citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
Yici Cai China	20	1.5k	826	196	133	131	220	1.7k
José Pineda de Gyvez Netherlands	20	1.7k 1.1×	720 0.9×	210 1.1×	65 0.5×	345 2.6×	173	2.0k
R.D. Blanton United States	25	1.5k 1.0×	1.3k 1.6×	71 0.4×	46 0.3×	134 1.0×	142	1.8k
Mark Zwoliński United Kingdom	18	985 0.7×	713 0.9×	170 0.9×	149 1.1×	109 0.8×	183	1.4k
Cheng‐Kok Koh United States	30	2.9k 2.0×	1.7k 2.1×	710 3.6×	164 1.2×	126 1.0×	190	3.3k
Guoyong Shi China	16	577 0.4×	295 0.4×	50 0.3×	137 1.0×	107 0.8×	133	903
Ranga Vemuri United States	25	1.6k 1.1×	1.8k 2.2×	757 3.9×	260 2.0×	152 1.2×	282	2.5k
R. Iris Bahar United States	25	1.7k 1.2×	1.2k 1.4×	456 2.3×	373 2.8×	201 1.5×	141	2.4k
Kanak Agarwal United States	26	1.8k 1.2×	803 1.0×	800 4.1×	27 0.2×	235 1.8×	101	2.5k
E. Roca Spain	15	998 0.7×	209 0.3×	110 0.6×	205 1.5×	100 0.8×	152	1.1k
Helmut Graeb Germany	21	1.6k 1.1×	874 1.1×	29 0.1×	315 2.4×	236 1.8×	122	1.8k

Countries citing papers authored by Yici Cai

Since Specialization

Citations

This map shows the geographic impact of Yici Cai's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Yici Cai with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Yici Cai more than expected).

Fields of papers citing papers by Yici Cai

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Yici Cai. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Yici Cai. The network helps show where Yici Cai may publish in the future.

Co-authorship network of co-authors of Yici Cai

This figure shows the co-authorship network connecting the top 25 collaborators of Yici Cai. A scholar is included among the top collaborators of Yici Cai based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Yici Cai. Yici Cai is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

Wang, Chenguang, et al.. (2018). ASAX: automatic security assertion extraction for detecting hardware trojans. Asia and South Pacific Design Automation Conference. 84–89. 5 indexed citations

Wang, Xueyan, Qiang Zhou, Yici Cai, & Gang Qu. (2018). A conflict-free approach for parallelizing SAT-based de-camouflaging attacks. Asia and South Pacific Design Automation Conference. 259–264. 3 indexed citations

Wang, Chenguang, Yici Cai, & Qiang Zhou. (2018). HLIFT: a high-level information flow tracking method for detecting hardware trojans. Asia and South Pacific Design Automation Conference. 727–732. 3 indexed citations

Cai, Yici, et al.. (2014). MCFRoute: a detailed router based on multi-commodity flow method. International Conference on Computer Aided Design. 397–404. 11 indexed citations

Yang, Jianlei, Zuowei Li, Yici Cai, & Qiang Zhou. (2011). PowerRush: a linear simulator for power grid. International Conference on Computer Aided Design. 482–487. 22 indexed citations

Yang, Jianlei, et al.. (2011). Fast Poisson solver preconditioned method for robust power grid analysis. International Conference on Computer Aided Design. 531–536. 7 indexed citations

Wang, Xiaoyi, et al.. (2009). An efficient decoupling capacitance optimization using piecewise polynomial models. Design, Automation, and Test in Europe. 1190–1195. 2 indexed citations

Tan, Sheldon X.-D., et al.. (2009). Statistical modeling and analysis of chip-level leakage power by spectral stochastic method. Asia and South Pacific Design Automation Conference. 161–166. 11 indexed citations

Zhu, K., et al.. (2009). A detailed router for hierarchical FPGAs based on simulated evolution. 114–117.

10.

Wang, Xiaoyi, et al.. (2008). Heuristic power/ground network and floorplan co-design method. Asia and South Pacific Design Automation Conference. 617–622. 4 indexed citations

11.

Li, Shuai, et al.. (2008). Vertical via design techniques for multi-layered P/G networks. Asia and South Pacific Design Automation Conference. 623–628. 2 indexed citations

12.

Cai, Yici, Qiang Zhou, Xianlong Hong, Rui Shi, & Yang Wang. (2008). Application of optical proximity correction technology. Science in China Series F Information Sciences. 51(2). 213–224. 6 indexed citations

13.

Fan, Jeffrey, et al.. (2007). Statistical model order reduction for interconnect circuits considering spatial correlations. Design, Automation, and Test in Europe. 1508–1513. 6 indexed citations

14.

Mi, Ning, et al.. (2007). Stochastic extended Krylov subspace method for variational analysis of on-chip power grid networks. Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design. 48–53. 7 indexed citations

15.

Yao, Hailong, Yici Cai, Qiang Zhou, & Xianlong Hong. (2005). Crosstalk-Aware Routing Resource Assignment. Journal of Computer Science and Technology. 20(2). 231–236. 1 indexed citations

16.

Zhang, Lihui, et al.. (2005). Optimal wire sizing in early-stage design of on-chip power/ground (P/G) networks. 3. 1936–1939. 2 indexed citations

17.

Luo, Zuying, et al.. (2004). A fast decoupling capacitor budgeting algorithm for robust on-chip power delivery. Asia and South Pacific Design Automation Conference. 505–510. 25 indexed citations

18.

Hong, Xianlong, et al.. (2002). An Efficient Hierarchical Timing-Driven Steiner Tree Algorithm for Global Routing. Asia and South Pacific Design Automation Conference. 473–478. 6 indexed citations

19.

Hong, Xianlong, et al.. (2001). Area minimization of power distribution network using efficient nonlinear programming techniques. International Conference on Computer Aided Design. 153–157. 42 indexed citations

20.

Ma, Yuchun, et al.. (2001). VLSI Floorplanning with Boundary Constraints Using Corner Block List Representation. IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences. 84(11). 2697–2704.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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