Makoto Yabuuchi

1.1k total citations
59 papers, 763 citations indexed

About

Makoto Yabuuchi is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computational Theory and Mathematics. According to data from OpenAlex, Makoto Yabuuchi has authored 59 papers receiving a total of 763 indexed citations (citations by other indexed papers that have themselves been cited), including 58 papers in Electrical and Electronic Engineering, 15 papers in Hardware and Architecture and 3 papers in Computational Theory and Mathematics. Recurrent topics in Makoto Yabuuchi's work include Low-power high-performance VLSI design (42 papers), Advancements in Semiconductor Devices and Circuit Design (41 papers) and Semiconductor materials and devices (39 papers). Makoto Yabuuchi is often cited by papers focused on Low-power high-performance VLSI design (42 papers), Advancements in Semiconductor Devices and Circuit Design (41 papers) and Semiconductor materials and devices (39 papers). Makoto Yabuuchi collaborates with scholars based in Japan, United States and Taiwan. Makoto Yabuuchi's co-authors include Koji Nii, Yasumasa Tsukamoto, Hirofumi Shinohara, S. Ohbayashi, Hiroshi Makino, Susumu Imaoka, Miki Tanaka, Shinji Tanaka, Y. Nakase and Koichiro Ishibashi and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, Japanese Journal of Applied Physics and IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

In The Last Decade

Makoto Yabuuchi

57 papers receiving 730 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
Makoto Yabuuchi Japan	13	739	167	44	27	15	59	763
Kunhyuk Kang United States	19	1.2k 1.6×	219 1.3×	40 0.9×	24 0.9×	7 0.5×	32	1.2k
Saibal Mukhopadhyay United States	15	559 0.8×	199 1.2×	42 1.0×	34 1.3×	26 1.7×	38	587
Liang-Teck Pang United States	10	431 0.6×	165 1.0×	18 0.4×	50 1.9×	6 0.4×	16	445
Fukashi Morishita Japan	10	243 0.3×	113 0.7×	85 1.9×	33 1.2×	10 0.7×	39	304
C.H. Kim United States	13	732 1.0×	189 1.1×	48 1.1×	80 3.0×	5 0.3×	16	755
Rakesh Vattikonda United States	8	1.2k 1.7×	290 1.7×	71 1.6×	15 0.6×	15 1.0×	9	1.3k
Blaine Stackhouse United States	8	309 0.4×	215 1.3×	109 2.5×	36 1.3×	8 0.5×	13	372
A. Tanabe Japan	12	463 0.6×	63 0.4×	34 0.8×	73 2.7×	15 1.0×	36	476
Baoxian Ji United States	2	504 0.7×	177 1.1×	43 1.0×	51 1.9×	9 0.6×	3	536
Georg Georgakos Germany	15	626 0.8×	167 1.0×	34 0.8×	90 3.3×	6 0.4×	48	651

Countries citing papers authored by Makoto Yabuuchi

Since Specialization

Citations

This map shows the geographic impact of Makoto Yabuuchi's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Makoto Yabuuchi with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Makoto Yabuuchi more than expected).

Fields of papers citing papers by Makoto Yabuuchi

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Makoto Yabuuchi. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Makoto Yabuuchi. The network helps show where Makoto Yabuuchi may publish in the future.

Co-authorship network of co-authors of Makoto Yabuuchi

This figure shows the co-authorship network connecting the top 25 collaborators of Makoto Yabuuchi. A scholar is included among the top collaborators of Makoto Yabuuchi based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Makoto Yabuuchi. Makoto Yabuuchi is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

Aoyagi, Y., Koji Nii, Makoto Yabuuchi, et al.. (2024). A 3-nm FinFET 27.6-Mbit/mm² Single-Port 6T SRAM Enabling 0.48–1.2 V Wide Operating Range With Far-End Pre-Charge and Weak-Bit Tracking. IEEE Journal of Solid-State Circuits. 59(4). 1225–1234.

Tanaka, Tomotaka, Makoto Yabuuchi, Y. Aoyagi, et al.. (2024). A 3nm Fin-FET 19.87-Mbit/mm² 2RW Pseudo Dual-Port 6T SRAM with High-R Wire Tracking and Sequential Access Aware Dynamic Power Reduction. 1–2.

Aoyagi, Y., Makoto Yabuuchi, Tomotaka Tanaka, et al.. (2023). A 3-nm 27.6-Mbit/mm2 Self-timed SRAM Enabling 0.48 - 1.2 V Wide Operating Range with Far-end Pre-charge and Weak-Bit Tracking. 1–2. 5 indexed citations

Yabuuchi, Makoto, et al.. (2018). A 28-nm 1R1W Two-Port 8T SRAM Macro With Screening Circuitry Against Read Disturbance and Wordline Coupling Noise Failures. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 26(11). 2335–2344. 6 indexed citations

Yabuuchi, Makoto, et al.. (2017). A 6.05-Mb/mm2 16-nm FinFET Double Pumping 1W1R 2-port SRAM with 313ps Read Access Time. IEICE Technical Report; IEICE Tech. Rep.. 117(9). 63–65. 4 indexed citations

Yabuuchi, Makoto, et al.. (2017). A 5.92-Mb/mm2 28-nm Pseudo 2-Read/Write Dual-Port SRAM Using Double Pumping Circuitry. IEICE Technical Report; IEICE Tech. Rep.. 116(446). 87–92. 3 indexed citations

Yabuuchi, Makoto, et al.. (2015). 20nm High-Density Single-Port and Dual-Port SRAMs with Wordline-Voltage-Adjustment System for Read/Write Assists. IEICE Technical Report; IEICE Tech. Rep.. 115(6). 1–4. 6 indexed citations

Yabuuchi, Makoto, et al.. (2014). 13.3 20nm High-density single-port and dual-port SRAMs with wordline-voltage-adjustment system for read/write assists. 234–235. 34 indexed citations

Yabuuchi, Makoto, Yasumasa Tsukamoto, Shinji Tanaka, et al.. (2014). 16 nm FinFET High-k/Metal-gate 256-kbit 6T SRAM macros with wordline overdriven assist. 3.3.1–3.3.3. 19 indexed citations

10.

Fujiwara, Hidehiro, Makoto Yabuuchi, & Koji Nii. (2014). Assessing uniqueness and reliability of SRAM-based Physical Unclonable Functions from silicon measurements in 45-nm bulk CMOS. 523–528. 1 indexed citations

11.

Nii, Koji, et al.. (2013). A cost-effective 45nm 6T-SRAM reducing 50mV Vmin and 53% standby leakage with multi-Vt asymmetric halo MOS and write assist circuitry. 113(173). 53–57. 1 indexed citations

12.

Fujiwara, Hiroshi, Makoto Yabuuchi, M. Morimoto, et al.. (2013). A 20nm 0.6V 2.1µW/MHz 128kb SRAM with no half select issue by interleave wordline and hierarchical bitline scheme. 16 indexed citations

13.

Yabuuchi, Makoto, et al.. (2011). A dynamic body-biased SRAM with asymmetric halo implant MOSFETs. 285–290. 1 indexed citations

14.

Fujiwara, Hiroshi, et al.. (2011). A Chip-ID generating circuit for dependable LSI using random address errors on embedded SRAM and on-chip memory BIST. 76–77. 11 indexed citations

15.

Yabuuchi, Makoto, et al.. (2009). A 45nm 0.6V Cross-Point 8T SRAM with Negative Biased Read/Write Assist. IEICE Technical Report; IEICE Tech. Rep.. 110(9). 13–159. 64 indexed citations

16.

Yabuuchi, Makoto, Koji Nii, Yasumasa Tsukamoto, et al.. (2008). A 45 nm Low-Standby-Power Embedded SRAM with Improved Immunity Against Process and Temperature Variations. IEICE technical report. Speech. 108(140). 17–21. 3 indexed citations

17.

Yabuuchi, Makoto, Koji Nii, Yasumasa Tsukamoto, et al.. (2007). A 45nm Low-Standby-Power Embedded SRAM with Improved Immunity Against Process and Temperature Variations. 326–606. 47 indexed citations

18.

Yabuuchi, Makoto, S. Ohbayashi, Koji Nii, et al.. (2006). A 65 nm SoC Embedded 6T-SRAM Design for Manufacturing with Read and Write Cell Stabilizing Circuits. 106(207). 149–153. 2 indexed citations

19.

Imaoka, Susumu, Koji Nii, Makoto Yabuuchi, et al.. (2006). A 65 nm Ultra-High-Density Dual-port SRAM with 0.71um2 8T-cell for SoC. IEICE Technical Report; IEICE Tech. Rep.. 106(206). 133–136. 3 indexed citations

20.

Ohbayashi, S., Makoto Yabuuchi, Koji Nii, et al.. (2006). A 65 nm SoC Embedded 6T-SRAM Design for Manufacturing with Read and Write Cell Stabilizing Circuits. 17–18. 32 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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