Yuchun Ma
- Electrical and Electronic Engineering top 10%
- Hardware and Architecture top 5%
- Computer Networks and Communications top 5%
- Computer Vision and Pattern Recognition top 10%
- Artificial Intelligence
- Topics
- VLSI and FPGA Design Techniques (59 papers)3D IC and TSV technologies (36 papers)Interconnection Networks and Systems (34 papers)
- Cited by
- Hardware and ArchitectureElectrical and Electronic EngineeringComputer Networks and Communications
- Journals
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsIEEE Transactions on Very Large Scale Integration (VLSI) SystemsACM Transactions on Design Automation of Electronic Systems
- Partner nations
- ChinaUnited StatesHong Kong
In The Last Decade
Yuchun Ma
82 papers receiving 719 citations
Peers
Comparison fields: 5 of 51
- Electrical and Electronic Engineering 629
- Hardware and Architecture 242
- Computer Networks and Communications 203
- Computer Vision and Pattern Recognition 82
- Artificial Intelligence 59
Countries citing papers authored by Yuchun Ma
This map shows the geographic impact of Yuchun Ma's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Yuchun Ma with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Yuchun Ma more than expected).
Fields of papers citing papers by Yuchun Ma
This network shows the impact of papers produced by Yuchun Ma. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Yuchun Ma. The network helps show where Yuchun Ma may publish in the future.
Co-authorship network of co-authors of Yuchun Ma
This figure shows the co-authorship network connecting the top 25 collaborators of Yuchun Ma. A scholar is included among the top collaborators of Yuchun Ma based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Yuchun Ma. Yuchun Ma is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 4 | |
| 2 | 1 | |
| 3 | 2 | |
| 4 | 6 | |
| 5 | 3 | |
| 6 | 23 | |
| 7 | 21 | |
| 8 | 0 | |
| 9 | 2 | |
| 10 | 21 | |
| 11 | 1 | |
| 12 | 2 | |
| 13 | 2 | |
| 14 | 2 | |
| 15 | 3 | |
| 16 | 8 | |
| 17 | 6 | |
| 18 | 3 | |
| 19 | VLSI Floorplanning with Boundary Constraints Using Corner Block List Representation | 0 |
| 20 | 5 |
About Yuchun Ma
Yuchun Ma is a scholar working on Hardware and Architecture, Computer Networks and Communications and Electrical and Electronic Engineering, having authored 93 papers that have together received 758 indexed citations. Recurring topics across this work include VLSI and FPGA Design Techniques (59 papers), 3D IC and TSV technologies (36 papers) and Interconnection Networks and Systems (34 papers). The work is most often cited by research in Hardware and Architecture (242 citations), Electrical and Electronic Engineering (629 citations) and Computer Networks and Communications (203 citations). Yuchun Ma has collaborated with scholars based in China, United States and Hong Kong. Frequent co-authors include Xianlong Hong, Sheqin Dong, Yu Wang, Chung‐Kuan Cheng, Glenn Reinman, Jun Gu, Yuan Xie, Qiang Zhou, Wayne Luk and Yici Cai. Their work appears in journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems and ACM Transactions on Design Automation of Electronic Systems.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.