Y. Nakase

521 citations
30 papers · 399 indexed · h-index 8
Topics
Low-power high-performance VLSI design (16 papers)Analog and Mixed-Signal Circuit Design (14 papers)Advanced DC-DC Converters (6 papers)
Journals
IEEE Journal of Solid-State CircuitsIEICE Transactions on ElectronicsIEE Proceedings - Circuits Devices and Systems

In The Last Decade

Y. Nakase

27 papers receiving 351 citations

Peers

Y. Nakase
Comparison fields: 5 of 20
  • Electrical and Electronic Engineering 357
  • Computational Theory and Mathematics 166
  • Biomedical Engineering 115
  • Hardware and Architecture 109
  • Signal Processing 56
Replace I‐Chyn Wey with:
I‐Chyn Wey Taiwan
A. Albicki United States
Uming Ko United States
M. Matsui Japan
Yuan‐Hua Chu Taiwan
K. Sasaki Japan
A. Chiba Japan
Chung-Hsun Huang Taiwan
Elı́as Todorovich Argentina
D. Draper United States
Y. Nakase relative to I‐Chyn Wey Taiwan I‐Chyn Wey's profile →
Citations per field
00.5×3.9×
I‐Chyn Wey · 1×
Citations per year

Countries citing papers authored by Y. Nakase

Since Specialization
Citations

This map shows the geographic impact of Y. Nakase's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Y. Nakase with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Y. Nakase more than expected).

Fields of papers citing papers by Y. Nakase

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Y. Nakase. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Y. Nakase. The network helps show where Y. Nakase may publish in the future.

Co-authorship network of co-authors of Y. Nakase

This figure shows the co-authorship network connecting the top 25 collaborators of Y. Nakase. A scholar is included among the top collaborators of Y. Nakase based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Y. Nakase. Y. Nakase is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
#WorkIndexed citations
1 5
2 1
3 3
4
A 45nm 0.6V Cross-Point 8T SRAM with Negative Biased Read/Write Assist
64
5 0
6 1
7 6
8 20
9 34
10 5
11
A 2.6-ns 64-b Fast and Small CMOS Adder (Special Issue on Ultra-High-Speed LSIs)
2
12 2
13 105
14 79
15
A High Speed Wide Band SRAM Macro using Complementary Half-Swing Bus Architecture
2
16 1
17 1
18 1
19 1
20
A Double Word Line Structure in ECL RAM
1

About Y. Nakase

Y. Nakase is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Computational Theory and Mathematics, having authored 30 papers that have together received 399 indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (16 papers), Analog and Mixed-Signal Circuit Design (14 papers) and Advanced DC-DC Converters (6 papers). The work is most often cited by research in Hardware and Architecture (109 citations), Computational Theory and Mathematics (166 citations) and Electrical and Electronic Engineering (357 citations). Y. Nakase has collaborated with scholars based in Japan, United States and Germany. Frequent co-authors include Hiroshi Makino, K. Mashiko, Hajime Suzuki, Hirofumi Shinohara, Yasumasa Tsukamoto, Makoto Yabuuchi, Koji Nii, Y. Horiba, Shinichi Hirose and Hiroshi Onoda. Their work appears in journals such as IEEE Journal of Solid-State Circuits, IEICE Transactions on Electronics and IEE Proceedings - Circuits Devices and Systems.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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