S. Kayano

637 total citations
42 papers, 453 citations indexed

About

S. Kayano is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, S. Kayano has authored 42 papers receiving a total of 453 indexed citations (citations by other indexed papers that have themselves been cited), including 39 papers in Electrical and Electronic Engineering, 13 papers in Hardware and Architecture and 5 papers in Computer Networks and Communications. Recurrent topics in S. Kayano's work include Semiconductor materials and devices (23 papers), Low-power high-performance VLSI design (15 papers) and Advancements in Semiconductor Devices and Circuit Design (15 papers). S. Kayano is often cited by papers focused on Semiconductor materials and devices (23 papers), Low-power high-performance VLSI design (15 papers) and Advancements in Semiconductor Devices and Circuit Design (15 papers). S. Kayano collaborates with scholars based in Japan, United States and Germany. S. Kayano's co-authors include Keiko Anami, Hirofumi Shinohara, Shijo Nagao, T. Yoshihara, Hiromitsu Takagi, Masahiko Yoshimoto, Takao Nakano, K. Mashiko, T. Wada and T. Yamada and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Industry Applications and IEEE Transactions on Electron Devices.

In The Last Decade

S. Kayano

41 papers receiving 416 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
S. Kayano Japan 12 396 140 73 51 41 42 453
H.-F.S. Law United States 5 465 1.2× 209 1.5× 45 0.6× 42 0.8× 104 2.5× 5 509
Hideo Ito Japan 11 334 0.8× 281 2.0× 39 0.5× 59 1.2× 18 0.4× 63 415
H. Kondoh Japan 11 317 0.8× 49 0.3× 68 0.9× 94 1.8× 145 3.5× 34 389
B.M. Gordon United Kingdom 4 446 1.1× 129 0.9× 23 0.3× 72 1.4× 165 4.0× 7 511
José L. Huertas Spain 9 228 0.6× 158 1.1× 19 0.3× 22 0.4× 127 3.1× 40 273
S.J. Daubert United States 6 241 0.6× 99 0.7× 20 0.3× 85 1.7× 191 4.7× 12 332
Saman Kiamehr Germany 18 712 1.8× 289 2.1× 55 0.8× 39 0.8× 30 0.7× 61 781
Yibin Ye United States 13 543 1.4× 157 1.1× 41 0.6× 63 1.2× 102 2.5× 30 601
P.G. Drennan United States 9 409 1.0× 102 0.7× 20 0.3× 20 0.4× 175 4.3× 17 438
Mi‐Kyung Oh South Korea 11 258 0.7× 34 0.2× 35 0.5× 139 2.7× 32 0.8× 47 331

Countries citing papers authored by S. Kayano

Since Specialization
Citations

This map shows the geographic impact of S. Kayano's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by S. Kayano with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites S. Kayano more than expected).

Fields of papers citing papers by S. Kayano

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by S. Kayano. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by S. Kayano. The network helps show where S. Kayano may publish in the future.

Co-authorship network of co-authors of S. Kayano

This figure shows the co-authorship network connecting the top 25 collaborators of S. Kayano. A scholar is included among the top collaborators of S. Kayano based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with S. Kayano. S. Kayano is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Kojima, Tetsuya, et al.. (2020). Position Sensorless Control of Synchronous Reluctance Machines Based on Magnetic Saturation Depending on Current Phase Angles. IEEE Transactions on Industry Applications. 56(3). 2171–2179. 9 indexed citations
3.
Kayano, S., Masayuki Sanada, & Shigeo Morimoto. (2010). Power characteristics of a permanent magnet flux switching generator for a low-speed wind turbine. 8. 258–263. 5 indexed citations
5.
Makino, Hiroshi, et al.. (2003). A soft error improved 7 ns/2.1-W GaAs 16-kb SRAM. 41–44.
6.
Kato, Shin, et al.. (2002). Output buffer with on-chip compensation circuit. 29.1.1–29.1.4. 5 indexed citations
7.
Matsumoto, Hirokazu, et al.. (1994). A high-density data-path generator with stretchable cells. IEEE Journal of Solid-State Circuits. 29(1). 2–8. 10 indexed citations
8.
Sawada, Ken & S. Kayano. (1992). An Evaluation of I/sub DDQ/ Versus Conventional Testing for CMOS Sea-of-Gate IC's. 158–158. 19 indexed citations
9.
Ohbayashi, S., Satoshi Takano, Keiko Anami, et al.. (1991). A 7 ns 1 Mb BiCMOS ECL SRAM with shift redundancy. IEEE Journal of Solid-State Circuits. 26(4). 507–512. 13 indexed citations
10.
Mashiko, K., Keisuke Okada, T. Yamada, et al.. (1991). A 336-neuron, 28 K-synapse, self-learning neural network chip with branch-neuron-unit architecture. IEEE Journal of Solid-State Circuits. 26(11). 1637–1644. 38 indexed citations
11.
Mashiko, K., Keisuke Okada, T. Yamada, et al.. (1991). A 336-neuron 28k-synapse Self-learning Neural Network Chip With Branch-neuron-unit Architecture. 182–313. 12 indexed citations
12.
Nakase, Y., et al.. (1991). A 2-ns 16K bipolar ECL RAM with reduced word-line voltage swing. IEEE Journal of Solid-State Circuits. 26(4). 518–524. 1 indexed citations
13.
Mashiko, K., Keisuke Okada, T. Yamada, et al.. (1990). A self-learning neural network chip with 125 neurons and 10 K self-organization synapses. 63–64. 5 indexed citations
14.
Kohno, Y., et al.. (1988). A 14-ns 1-Mbit CMOS SRAM with variable bit organization. IEEE Journal of Solid-State Circuits. 23(5). 1060–1066. 19 indexed citations
15.
Takano, Satoshi, et al.. (1987). A 16K GaAs SRAM. 33. 140–141. 1 indexed citations
16.
Kayano, S., et al.. (1987). A double-word-line structure in bipolar ECL random access memory. IEEE Journal of Solid-State Circuits. 22(4). 543–547. 1 indexed citations
17.
Nakase, Y., et al.. (1986). A Double Word Line Structure in ECL RAM. Symposium on VLSI Technology. 75–76. 1 indexed citations
18.
Shinohara, Hirofumi, Keiko Anami, T. Wada, et al.. (1985). A 45-ns 256K CMOS static RAM with a tri-level word line. IEEE Journal of Solid-State Circuits. 20(5). 929–934. 9 indexed citations
19.
Yoshimoto, Masahiko, Keiko Anami, Hirofumi Shinohara, et al.. (1983). A 64Kb full CMOS RAM with divided word line structure. 58–59. 34 indexed citations
20.
Kayano, S., et al.. (1982). A New Isolation Technology for Bipolar Devices by Low Pressure Selective Silicon Epitaxy. 116–117. 5 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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