Chung-Hsun Huang

443 citations
29 papers · 334 indexed · h-index 9
Topics
Low-power high-performance VLSI design (15 papers)Analog and Mixed-Signal Circuit Design (15 papers)Advancements in Semiconductor Devices and Circuit Design (8 papers)
Partner nations
TaiwanUnited States

In The Last Decade

Chung-Hsun Huang

27 papers receiving 298 citations

Peers

Chung-Hsun Huang
Comparison fields: 5 of 34
  • Electrical and Electronic Engineering 264
  • Biomedical Engineering 174
  • Hardware and Architecture 80
  • Computer Networks and Communications 55
  • Computational Theory and Mathematics 39
Replace I‐Chyn Wey with:
I‐Chyn Wey Taiwan
Uming Ko United States
H. Sanchez United States
Debiprasad Priyabrata Acharya India
Alessandro Cevrero Switzerland
Seongjong Kim United States
Young-Hyun Jun South Korea
Haroon Waris China
D. Stark United States
Juinn-Dar Huang Taiwan
Chung-Hsun Huang relative to I‐Chyn Wey Taiwan I‐Chyn Wey's profile →
Citations per field
00.5×1.5×2.4×
I‐Chyn Wey · 1×
Citations per year

Countries citing papers authored by Chung-Hsun Huang

Since Specialization
Citations

This map shows the geographic impact of Chung-Hsun Huang's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Chung-Hsun Huang with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Chung-Hsun Huang more than expected).

Fields of papers citing papers by Chung-Hsun Huang

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Chung-Hsun Huang. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Chung-Hsun Huang. The network helps show where Chung-Hsun Huang may publish in the future.

Co-authorship network of co-authors of Chung-Hsun Huang

This figure shows the co-authorship network connecting the top 25 collaborators of Chung-Hsun Huang. A scholar is included among the top collaborators of Chung-Hsun Huang based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Chung-Hsun Huang. Chung-Hsun Huang is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
#WorkIndexed citations
1 0
2 1
3 10
4 3
5 17
6 1
7 3
8 3
9 3
10 4
11 1
12 0
13 38
14 6
15 5
16 10
17 2
18 70
19 7
20 46

About Chung-Hsun Huang

Chung-Hsun Huang is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Computer Vision and Pattern Recognition, having authored 29 papers that have together received 334 indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (15 papers), Analog and Mixed-Signal Circuit Design (15 papers) and Advancements in Semiconductor Devices and Circuit Design (8 papers). The work is most often cited by research in Hardware and Architecture (80 citations), Electrical and Electronic Engineering (264 citations) and Biomedical Engineering (174 citations). Chung-Hsun Huang has collaborated with scholars based in Taiwan and United States. Frequent co-authors include Jinn‐Shyan Wang, Chao‐Chun Chen, Chingwei Yeh, Yuan‐Sun Chu, Yiming Wang, Yiming Wang, Ming‐Jen Chen, Thomas Fischer, Chris Smith and Bo‐Chao Cheng. Their work appears in journals such as IEEE Transactions on Power Electronics, Sensors and IEEE Journal of Solid-State Circuits.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact

Rankless by CCL
2026