Wei Yip Loh

438 total citations
27 papers, 348 citations indexed

About

Wei Yip Loh is a scholar working on Electrical and Electronic Engineering, Atomic and Molecular Physics, and Optics and Materials Chemistry. According to data from OpenAlex, Wei Yip Loh has authored 27 papers receiving a total of 348 indexed citations (citations by other indexed papers that have themselves been cited), including 25 papers in Electrical and Electronic Engineering, 8 papers in Atomic and Molecular Physics, and Optics and 3 papers in Materials Chemistry. Recurrent topics in Wei Yip Loh's work include Semiconductor materials and devices (24 papers), Advancements in Semiconductor Devices and Circuit Design (18 papers) and Semiconductor materials and interfaces (7 papers). Wei Yip Loh is often cited by papers focused on Semiconductor materials and devices (24 papers), Advancements in Semiconductor Devices and Circuit Design (18 papers) and Semiconductor materials and interfaces (7 papers). Wei Yip Loh collaborates with scholars based in Singapore, United States and South Korea. Wei Yip Loh's co-authors include Byung Jin Cho, Goutam Kumar Dalapati, Yi Tong, Chang Yong Kang, Anupama Bowonder, Prashant Majhi, Tsu‐Jae King Liu, Raj Jammy, Kanghoon Jeon and Ali Javey and has published in prestigious journals such as Applied Physics Letters, Journal of Applied Physics and IEEE Transactions on Electron Devices.

In The Last Decade

Wei Yip Loh

24 papers receiving 337 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Wei Yip Loh Singapore 9 332 68 63 46 18 27 348
S. Brus Belgium 13 469 1.4× 98 1.4× 86 1.4× 56 1.2× 14 0.8× 48 492
R. Kies France 10 317 1.0× 84 1.2× 33 0.5× 44 1.0× 19 1.1× 21 323
Yuan Taur United States 10 351 1.1× 74 1.1× 73 1.2× 26 0.6× 15 0.8× 13 362
Reinaldo A. Vega United States 13 553 1.7× 43 0.6× 94 1.5× 64 1.4× 12 0.7× 32 572
E. Simoen Belgium 12 370 1.1× 35 0.5× 63 1.0× 42 0.9× 19 1.1× 44 382
N. Zamani United States 5 364 1.1× 127 1.9× 72 1.1× 12 0.3× 17 0.9× 12 391
T. Grabolla Germany 10 224 0.7× 63 0.9× 42 0.7× 47 1.0× 9 0.5× 31 263
E. Ungersboeck Austria 12 321 1.0× 85 1.3× 84 1.3× 95 2.1× 5 0.3× 27 366
Ming Zhu Singapore 12 324 1.0× 80 1.2× 113 1.8× 59 1.3× 11 0.6× 40 343
F.N. Cubaynes Belgium 9 369 1.1× 48 0.7× 34 0.5× 60 1.3× 7 0.4× 26 388

Countries citing papers authored by Wei Yip Loh

Since Specialization
Citations

This map shows the geographic impact of Wei Yip Loh's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Wei Yip Loh with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Wei Yip Loh more than expected).

Fields of papers citing papers by Wei Yip Loh

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Wei Yip Loh. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Wei Yip Loh. The network helps show where Wei Yip Loh may publish in the future.

Co-authorship network of co-authors of Wei Yip Loh

This figure shows the co-authorship network connecting the top 25 collaborators of Wei Yip Loh. A scholar is included among the top collaborators of Wei Yip Loh based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Wei Yip Loh. Wei Yip Loh is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Lee, Rinus T. P., Wei Yip Loh, Tommaso Orzali, et al.. (2015). (Invited) Technology Options to Reduce Contact Resistance in Nanoscale III-V MOSFETs. ECS Transactions. 66(4). 125–134. 4 indexed citations
2.
Majumdar, Kausik, C. Huffman, T. Ngai, et al.. (2013). STLM: A Sidewall TLM Structure for Accurate Extraction of Ultralow Specific Contact Resistivity. IEEE Electron Device Letters. 34(9). 1082–1084. 17 indexed citations
3.
4.
Hill, Richard J., Wei Yip Loh, Dmitry Veksler, et al.. (2012). (Invited) Integration Challenges of III-V Materials in Advanced CMOS Logic. ECS Transactions. 45(6). 179–184. 1 indexed citations
5.
Hill, Richard J., Jungwoo Oh, Joel Barnett, et al.. (2011). CMOS Scaling with III-V Channels for Improved Performance and Low Power. ECS Transactions. 35(3). 335–344. 2 indexed citations
6.
Loh, Wei Yip, P. Y. Hung, G. Bersuker, et al.. (2011). High temperature millisecond silicide anneal for contact resistivity &#x003C; 10<sup>&#x2212;8</sup> &#x03A9;cm<sup>2</sup>. 1–2. 1 indexed citations
7.
Demkov, Alexander A., et al.. (2011). Work function engineering in silicides: Chlorine doping in NiSi. Journal of Applied Physics. 109(8). 5 indexed citations
8.
Oh, Jungwoo, Kyeong‐Sik Min, Byoung‐Gue Min, et al.. (2010). SiGe CMOS on (110) channel orientation with mobility boosters : Surface orientation, channel directions, and uniaxial strain. 39–40. 9 indexed citations
9.
Smith, Casey, Wei Yip Loh, P. Majhi, et al.. (2010). Contact resistance reduction to FinFET source/drain using dielectric dipole mitigated Schottky barrier height tuning. 13. 26.3.1–26.3.4. 5 indexed citations
10.
11.
Wang, X.P., H.Y. Yu, M.-F. Li, et al.. (2007). Wide $V_{\rm fb}$ and $V_{\rm th}$ Tunability for Metal-Gated MOS Devices With HfLaO Gate Dielectrics. IEEE Electron Device Letters. 28(4). 258–260. 50 indexed citations
12.
Dalapati, Goutam Kumar, et al.. (2007). Impact of interfacial layer control using Gd2O3 in HfO2 gate dielectric on GaAs. Applied Physics Letters. 90(18). 62 indexed citations
13.
14.
Bliznetsov, Vladimir, R. Rakesh Kumar, L. K. Bera, et al.. (2005). Overcoming Challenges in Metal Gate Etching for Sub-45 nm Technology Node. 1 indexed citations
15.
Loh, Wei Yip, Byung Jin Cho, Moon Sig Joo, et al.. (2004). Analysis of charge trapping and breakdown mechanism in high-k dielectrics with metal gate electrode using carrier separation. 38.3.1–38.3.4. 15 indexed citations
16.
Loh, Wei Yip, B.J. Cho, M. S. Joo, et al.. (2004). Charge Trapping and Breakdown Mechanism in HfAlO/TaN Gate Stack Analyzed Using Carrier Separation. IEEE Transactions on Device and Materials Reliability. 4(4). 696–703. 13 indexed citations
17.
Loh, Wei Yip, et al.. (2003). Localized oxide degradation in ultrathin gate dielectric and its statistical analysis. IEEE Transactions on Electron Devices. 50(4). 967–972. 2 indexed citations
18.
19.
Cho, Byung Jin, et al.. (2002). Impact of decoupled plasma nitridation of ultra-thin gate oxide on the performance of p-channel MOSFETs. Semiconductor Science and Technology. 17(6). L25–L28. 6 indexed citations
20.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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