Poi-Siong Teo

444 total citations
18 papers, 372 citations indexed

About

Poi-Siong Teo is a scholar working on Electrical and Electronic Engineering, Mechanics of Materials and Atomic and Molecular Physics, and Optics. According to data from OpenAlex, Poi-Siong Teo has authored 18 papers receiving a total of 372 indexed citations (citations by other indexed papers that have themselves been cited), including 18 papers in Electrical and Electronic Engineering, 2 papers in Mechanics of Materials and 2 papers in Atomic and Molecular Physics, and Optics. Recurrent topics in Poi-Siong Teo's work include Electronic Packaging and Soldering Technologies (17 papers), 3D IC and TSV technologies (11 papers) and Nanomaterials and Printing Technologies (3 papers). Poi-Siong Teo is often cited by papers focused on Electronic Packaging and Soldering Technologies (17 papers), 3D IC and TSV technologies (11 papers) and Nanomaterials and Printing Technologies (3 papers). Poi-Siong Teo collaborates with scholars based in Singapore, Netherlands and Germany. Poi-Siong Teo's co-authors include Subodh G. Mhaisalkar, E.H. Wong, D. Pinjala, Christian Wong, Lay Kuan Teh, Hengyun Zhang, Zhong Chen, Chin Foo Goh, Mingyi He and Freddy Boey and has published in prestigious journals such as Journal of Applied Physics, Thin Solid Films and Materials Science and Engineering B.

In The Last Decade

Poi-Siong Teo

18 papers receiving 343 citations

Peers

Countries citing papers authored by Poi-Siong Teo

Since Specialization

Citations

This map shows the geographic impact of Poi-Siong Teo's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Poi-Siong Teo with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Poi-Siong Teo more than expected).

Fields of papers citing papers by Poi-Siong Teo

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Poi-Siong Teo. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Poi-Siong Teo. The network helps show where Poi-Siong Teo may publish in the future.

Co-authorship network of co-authors of Poi-Siong Teo

This figure shows the co-authorship network connecting the top 25 collaborators of Poi-Siong Teo. A scholar is included among the top collaborators of Poi-Siong Teo based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Poi-Siong Teo. Poi-Siong Teo is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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18 of 18 papers shown

#	Work	Indexed citations
1	Modeling of smoothening effect on morphologies of annealed submicron nickel particles used for electrically conductive adhesives 2006 ·Journal of Applied Physics ·Chin Foo Goh, (unknown), Subodh G. Mhaisalkar, Freddy Boey, Andriy Gusak, Poi-Siong Teo	2
2	The effect of annealing on the morphologies and conductivities of sub-micrometer sized nickel particles used for electrically conductive adhesive 2005 ·Thin Solid Films ·Chin Foo Goh, H.Y. Yu, (unknown), Subodh G. Mhaisalkar, Freddy Boey, Poi-Siong Teo	29
3	Moisture-induced failures of adhesive flip chip interconnects 2005 ·IEEE Transactions on Components and Packaging Technologies ·Lay Kuan Teh, (unknown), (unknown), Christian Wong, Subodh G. Mhaisalkar, Poi-Siong Teo, E.H. Wong	57
4	Correlation of material properties to reliability performance of anisotropic conductive adhesive flip chip packages 2005 ·IEEE Transactions on Components and Packaging Technologies ·(unknown), Subodh G. Mhaisalkar, E.H. Wong, Poi-Siong Teo, Christian Wong, (unknown), Chin Foo Goh, Lay Kuan Teh	17
5	Thermo-mechanical finite element analysis in a multichip build up substrate based package design 2004 ·Microelectronics Reliability ·Xiaowu Zhang, E.H. Wong, Charles Lee, (unknown), (unknown), Poi-Siong Teo, D. Pinjala, (unknown)	29
6	Evaluation of the ultra thin multi die outline (Ulthimo) concept as a package for high frequency transistors 2004 ·(unknown), (unknown), (unknown), J.F.J.M. Caers, Poi-Siong Teo, Mihai Rotaru	2
7	Thermal management of high power dissipation electronic packages: from air cooling to liquid cooling 2004 ·Hengyun Zhang, D. Pinjala, Poi-Siong Teo	51
8	Synthesis and cure kinetics of isotropic conductive adhesives comprising sub-micrometer sized nickel particles 2004 ·Materials Science and Engineering B ·Chin Foo Goh, H.Y. Yu, (unknown), Subodh G. Mhaisalkar, Freddy Boey, Poi-Siong Teo	31
9	Effects of anisotropic conductive adhesive (ACA) material properties on package reliability performance [flip-chip interconnects] 2004 ·(unknown), Subodh G. Mhaisalkar, E.H. Wong, Poi-Siong Teo, (unknown), (unknown), Chin Foo Goh	10
10	High density fine pitch Pb-free flip-chip interconnect assembly 2004 ·(unknown), (unknown), (unknown), Poi-Siong Teo	2
11	Development and reliability of non-conductive adhesive flip-chip packages 2004 ·Thin Solid Films ·Lay Kuan Teh, (unknown), Christian Wong, Subodh G. Mhaisalkar, E.H. Wong, Poi-Siong Teo, Zhong Chen	51
12	Effect of electromigration on interfacial reactions between electroless Ni-P and Sn–3.5% Ag solder 2004 ·Thin Solid Films ·(unknown), Mingyi He, Zhong Chen, Poi-Siong Teo	40
13	Thermal design of heat spreader and analysis of thermal interface materials (TIM) for multi-chip package 2003 ·D. Pinjala, (unknown), Ling Xie, Poi-Siong Teo, E.H. Wong, M.K. Iyer, (unknown), (unknown)	12
14	Calibration of a piezoresistive stress sensor in [100] silicon test chips 2003 ·Z.W. Zhong, Xiaowu Zhang, (unknown), E.H. Wong, Poi-Siong Teo, M.K. Iyer	10
15	Application of no-flow underfill for a reliable high performance Flip Chip Flex BGA 2003 ·Poi-Siong Teo, (unknown), (unknown), M.K. Iyer	1
16	Reliability assessment of flipchip on build up laminate based multi-chip package 2003 ·(unknown), (unknown), (unknown), E.H. Wong, (unknown), D. Pinjala, S. Murthy, Poi-Siong Teo	6
17	Development of a lead free chip scale package for wireless applications 2002 ·V. Kripesh, Poi-Siong Teo, (unknown), (unknown), (unknown)	21
18	Microstructure Studies of Under Bump Metallization Systems Using Transmission Electron Microscopy 2002 ·Proceedings - International Symposium for Testing and Failure Analysis ·Chih-Hang Tung, Poi-Siong Teo, (unknown), (unknown)	1

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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