L. Brévard

1.3k total citations
38 papers, 405 citations indexed

About

L. Brévard is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Atomic and Molecular Physics, and Optics. According to data from OpenAlex, L. Brévard has authored 38 papers receiving a total of 405 indexed citations (citations by other indexed papers that have themselves been cited), including 38 papers in Electrical and Electronic Engineering, 4 papers in Biomedical Engineering and 3 papers in Atomic and Molecular Physics, and Optics. Recurrent topics in L. Brévard's work include Semiconductor materials and devices (36 papers), Advancements in Semiconductor Devices and Circuit Design (35 papers) and Integrated Circuits and Semiconductor Failure Analysis (15 papers). L. Brévard is often cited by papers focused on Semiconductor materials and devices (36 papers), Advancements in Semiconductor Devices and Circuit Design (35 papers) and Integrated Circuits and Semiconductor Failure Analysis (15 papers). L. Brévard collaborates with scholars based in France, Switzerland and Japan. L. Brévard's co-authors include S. Deleonibus, O. Weber, O. Faynot, L. Tosti, F. Andrieu, F. Bœuf, F. Andrieu, F. Allain, C. Fenouillet-Béranger and O. Rozeau and has published in prestigious journals such as Applied Surface Science, IEEE Transactions on Electron Devices and Nanotechnology.

In The Last Decade

L. Brévard

37 papers receiving 394 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
L. Brévard France 11 400 55 24 21 5 38 405
N. Rovedo United States 10 394 1.0× 46 0.8× 27 1.1× 34 1.6× 5 1.0× 20 396
Greg Leung United States 8 387 1.0× 71 1.3× 22 0.9× 9 0.4× 8 1.6× 13 395
M.M. Chowdhury United States 8 467 1.2× 48 0.9× 17 0.7× 15 0.7× 7 1.4× 12 477
J. Lacord France 10 376 0.9× 85 1.5× 21 0.9× 23 1.1× 11 2.2× 34 385
K. Schruefer United States 12 484 1.2× 102 1.9× 31 1.3× 24 1.1× 8 1.6× 32 488
I.-C. Chen United States 9 239 0.6× 25 0.5× 29 1.2× 29 1.4× 3 0.6× 22 253
Shiying Xiong United States 5 419 1.0× 65 1.2× 30 1.3× 23 1.1× 15 3.0× 5 435
Ming-Hung Han Taiwan 9 415 1.0× 87 1.6× 13 0.5× 14 0.7× 10 2.0× 18 421
Chih-Sheng Chang Taiwan 8 241 0.6× 32 0.6× 38 1.6× 11 0.5× 9 1.8× 18 250
R. Schreutelkamp Belgium 10 257 0.6× 51 0.9× 39 1.6× 41 2.0× 4 0.8× 31 276

Countries citing papers authored by L. Brévard

Since Specialization
Citations

This map shows the geographic impact of L. Brévard's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by L. Brévard with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites L. Brévard more than expected).

Fields of papers citing papers by L. Brévard

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by L. Brévard. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by L. Brévard. The network helps show where L. Brévard may publish in the future.

Co-authorship network of co-authors of L. Brévard

This figure shows the co-authorship network connecting the top 25 collaborators of L. Brévard. A scholar is included among the top collaborators of L. Brévard based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with L. Brévard. L. Brévard is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Kim, Donghyun, et al.. (2020). Reduction of random telegraph noise by high-pressure deuterium annealing for p-type omega-gate nanowire FET. Nanotechnology. 31(41). 415201–415201. 10 indexed citations
2.
Deshpande, Veeresh, H. Hahn, Eileen O’Connor, et al.. (2017). Demonstration of 3-D SRAM Cell by 3-D Monolithic Integration of InGaAs n-FinFETs on FDSOI CMOS With Interlayer Contacts. IEEE Transactions on Electron Devices. 64(11). 4503–4509. 12 indexed citations
3.
Deshpande, Veeresh, H. Hahn, Eileen O’Connor, et al.. (2017). First demonstration of 3D SRAM through 3D monolithic integration of InGaAs n-FinFETs on FDSOI Si CMOS with inter-layer contacts. T74–T75. 17 indexed citations
4.
Weber, O., F. Andrieu, F. Allain, et al.. (2011). Drain current variability and MOSFET parameters correlations in planar FDSOI technology. 25.5.1–25.5.4. 21 indexed citations
5.
Andrieu, F., O. Weber, P. Perreau, et al.. (2010). Fully Depleted Strained Silicon-on-Insulator p-MOSFETs With Recessed and Embedded Silicon–Germanium Source/Drain. IEEE Electron Device Letters. 31(10). 1074–1076. 10 indexed citations
6.
Poiroux, T., François Andrieu, O. Weber, et al.. (2010). Ultra-thin body Silicon On Insulator and nanowire transistors for 22nm technology node and below. 30–34. 1 indexed citations
7.
Hutin, Louis, C. Le Royer, F. Andrieu, et al.. (2010). Dual Strained Channel co-integration into CMOS, RO and SRAM cells on FDSOI down to 17nm gate length. 95. 11.1.1–11.1.4. 8 indexed citations
8.
Mazurier, J., O. Weber, F. Andrieu, et al.. (2010). High performance and low variability fully-depleted strained-SOI MOSFETs. 1–2. 2 indexed citations
9.
Weber, O., F. Andrieu, C. Fenouillet-Béranger, et al.. (2009). High Scalability and Low Variability of Planar Fully Depleted SOI MOSFETs. ECS Transactions. 22(1). 71–80. 2 indexed citations
10.
Widiez, J., F. Andrieu, S. Saada, et al.. (2009). First demonstration of heat dissipation improvement in CMOS technology using Silicon-On-Diamond (SOD) substrates. HAL (Le Centre pour la Communication Scientifique Directe). 1–2. 10 indexed citations
11.
Kuriyama, A., et al.. (2007). A systematic investigation of work function in advanced metal gate–HfO2–SiO2 structures with bevel oxide. Solid-State Electronics. 51(11-12). 1515–1522. 7 indexed citations
12.
Gallon, C., A. Vandooren, F. Bœuf, et al.. (2006). Ultra-Thin Fully Depleted SOI Devices with Thin BOX, Ground Plane and Strained Liner Booster. 99. 17–18. 12 indexed citations
13.
Ritzenthaler, R., C. Dupré, Xavier Mescot, et al.. (2006). Mobility behavior in narrow Ω-gateFETs devices. 77–78. 4 indexed citations
14.
Kuriyama, A., Olivier Faynot, L. Brévard, et al.. (2006). Work Function Investigation in Advanced Metal Gate-HfO2-SiO2 Systems with Bevel Structures. 26. 109–112. 2 indexed citations
15.
Andrieu, F., T. Ernst, O. Faynot, et al.. (2006). Performance and physics of sub-50nm strained Si on Si1−xGex-on-insulator (SGOI) nMOSFETs. Solid-State Electronics. 50(4). 566–572. 2 indexed citations
17.
Jahan, C., O. Faynot, M. Cassé, et al.. (2005). ΩFETs transistors with tin metal gate and HfO/sub 2/ down to 10nm. 112–113. 18 indexed citations
18.
Andrieu, F., T. Ernst, K. Romanjek, et al.. (2004). SiGe channel p-MOSFETs scaling-down. 267–270. 12 indexed citations
19.
Haartman, Martin von, Per‐Erik Hellström, Mikael Östling, et al.. (2004). Influence of gate width on 50 nm gate length Si/sub 0.7/Ge/sub 0.3/ channel PMOSFETs. 529–532. 4 indexed citations
20.
Ducroquet, F., T. Ernst, O. Weber, et al.. (2003). Electrical properties of Si1−yCy/Si/SiO2 interface for sub 50 nm strained-channel nMOSFETs. Applied Surface Science. 224(1-4). 274–277. 2 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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