L. Breuil

811 citations

70 papers · 657 · h-index 15

Impact in

Electrical and Electronic Engineering top 10%
- Semiconductor materials and devices
- Advanced Memory and Neural Computing
- Advancements in Semiconductor Devices and Circuit Design
- Ferroelectric and Negative Capacitance Devices
- Integrated Circuits and Semiconductor Failure Analysis
- Thin-Film Transistor Technologies
Computer Networks and Communications top 10%
- Advanced Data Storage Technologies

Papers in

Electrical and Electronic Engineering 69
- Semiconductor materials and devices 68
- Advanced Memory and Neural Computing 29
- Advancements in Semiconductor Devices and Circuit Design 19
- Ferroelectric and Negative Capacitance Devices 16
- Integrated Circuits and Semiconductor Failure Analysis 11
Computer Networks and Communications 21
- Advanced Data Storage Technologies 21

Co-authors: Jan Van Houdt (52 shared papers)G. Van den bosch (54 shared papers)A. Cacciato (23 shared papers)A. Arreghini (28 shared papers)Pieter Blomme (20 shared papers)A. Furnémont (14 shared papers)J. G. Lisoni (14 shared papers)K. De Meyer (11 shared papers)
Journals: IEEE Electron Device Letters (6 papers)IEEE Transactions on Electron Devices (4 papers)Microelectronic Engineering (4 papers)Solid-State Electronics (4 papers)Applied Physics Letters (2 papers)
Partner nations: Belgium United Kingdom United States

In The Last Decade

L. Breuil

67 papers receiving 628 citations

Peers

Countries citing papers authored by L. Breuil

Since Specialization

Citations

This map shows the geographic impact of L. Breuil's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by L. Breuil with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites L. Breuil more than expected).

Fields of papers citing papers by L. Breuil

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by L. Breuil. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by L. Breuil. The network helps show where L. Breuil may publish in the future.

Co-authors

The 25 scholars most cited alongside L. Breuil, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with L. Breuil Line = papers co-authored together L. Breuil links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

Showing the 20 most-cited of 70 papers — load more, or switch the sort, to bring in the rest.

#	Work
1	Intrinsic electron traps in atomic-layer deposited HfO2 insulators Applied Physics Letters ·Florin Cerbu, Oreste Madia, D. V. Andreev, Sivan Fadida, M. Eizenberg, L. Breuil, J. G. Lisoni, J. A. Kittl, Jack Strand, Alexander L. Shluger, V. V. Afanas’ev, Michel Houssa, A. Stesmans	2016	47
2	Validation of Retention Modeling as a Trap-Profiling Technique for SiN-Based Charge-Trapping Memories IEEE Electron Device Letters ·A. Suhane, A. Arreghini, R. Degraeve, G. Van den bosch, L. Breuil, M. B. Zahid, M. Jurczak, K. De Meyer, Jan Van Houdt	2009	41
3	Highly Scaled Vertical Cylindrical SONOS Cell With Bilayer Polysilicon Channel for 3-D nand Flash Memory IEEE Electron Device Letters ·G. Van den bosch, Gouri Sankar Kar, Pieter Blomme, A. Arreghini, A. Cacciato, L. Breuil, A. De Keersgieter, Vasile Paraschiv, C. Vrancken, Bastien Douhard, Olivier Richard, Steven Van Aerde, I. Debusschere, Jan Van Houdt	2011	39
4	A New Scalable Self-Aligned Dual-Bit Split-Gate Charge-Trapping Memory Device IEEE Transactions on Electron Devices ·L. Breuil, L. Haspeslagh, Pieter Blomme, D. Wellekens, J. DeVos, M. Lorenzini, J. VanHoudt	2005	27
5	Defect profiling in FEFET Si:HfO2 layers Applied Physics Letters ·Barry O’Sullivan, V. Putcha, Roman Izmailov, V. V. Afanas’ev, Eddy Simoen, Taehwan Jung, Y. Higashi, R. Degraeve, B. Truijen, B. Kaczer, N. Ronchi, S. R. C. McMitchell, Kaustuv Banerjee, Sergiu Clima, L. Breuil, G. Van den bosch, D. Linten, Jan Van Houdt	2020	25
6	Nitride Engineering for Improved Erase Performance and Retention of TANOS NAND Flash Memory G. Van den bosch, A. Furnémont, M. B. Zahid, R. Degraeve, L. Breuil, A. Cacciato, A. Rothschild, Chris Olsen, Udayan Ganguly, Jan Van Houdt	2008	25
7	Hybrid Floating Gate Cell for Sub-20-nm NAND Flash Memory Technology IEEE Electron Device Letters ·Pieter Blomme, A. Cacciato, D. Wellekens, L. Breuil, M. Rosmeulen, Gouri Sankar Kar, S. Locorotondo, C. Vrancken, Olivier Richard, I. Debusschere, Jan Van Houdt	2012	23
8	${\rm HfO}_{2}$ Based High-$k$ Inter-Gate Dielectrics for Planar NAND Flash Memory IEEE Electron Device Letters ·L. Breuil, J. G. Lisoni, Pieter Blomme, G. Van den bosch, Jan Van Houdt	2014	21
9	First demonstration of ferroelectric Si:HfO2 based 3D FE-FET with trench architecture for dense nonvolatile memory application Kaustuv Banerjee, L. Breuil, Alexey Milenin, Murat Pak, J. Stiers, S. R. C. McMitchell, Luca Piazza, G. Van den bosch, Jan Van Houdt	2021	19
10	Novel Bi-Layer Poly-Silicon Channel Vertical Flash Cell for Ultrahigh Density 3D SONOS NAND Technology Gouri Sankar Kar, G. Van den bosch, A. Cacciato, Pieter Blomme, Steven Van Aerde, A. Arreghini, L. Breuil, A. De Keersgieter, Vasile Paraschiv, C. Vrancken, Bastien Douhard, Olivier Richard, I. Debusschere, Jan Van Houdt, B.J. Tang	2011	19
11	Investigation of Window Instability in Program/Erase Cycling of TANOS NAND Flash Memory Zenodo (CERN European Organization for Nuclear Research) ·G. Van den bosch, L. Breuil, A. Cacciato, A. Rothschild, M. Jurczak, Jan Van Houdt	2009	18
12	Improvement of Poly-Si Channel Vertical Charge Trapping NAND Devices Characteristics by High Pressure D2/H2 Annealing L. Breuil, J. G. Lisoni, Romain Delhougne, C.-L. Tan, Jan Van Houdt, G. Van den bosch, A. Furnémont	2016	17
13	Impact of Charge Trapping and Depolarization on Data Retention Using Simultaneous P–V and I–V in HfO₂-Based Ferroelectric FET IEEE Transactions on Electron Devices ·Y. Higashi, N. Ronchi, B. Kaczer, Md Nur K. Alam, Barry O’Sullivan, Kaustuv Banerjee, S. R. C. McMitchell, L. Breuil, A. Walke, G. Van den bosch, D. Linten, Jan Van Houdt	2021	17
14	Experimental and theoretical verification of channel conductivity degradation due to grain boundaries and defects in 3D NAND A. Subirats, A. Arreghini, E. Capogreco, Romain Delhougne, C.-L. Tan, Andriy Hikavyy, L. Breuil, R. Degraeve, V. Putcha, G. Van den bosch, D. Linten, A. Furnémont	2017	16
15	Physical understanding and modeling of SANOS retention in programmed state Solid-State Electronics ·A. Furnémont, A. Cacciato, L. Breuil, M. Rosmeulen, H.E. Maes, K. De Meyer, Jan Van Houdt	2008	15
16	A Consistent Model for the SANOS Programming Operation A. Furnémont, M. Rosmeulen, A. Cacciato, L. Breuil, K. De Meyer, H.E. Maes, Jan Van Houdt	2007	14
17	Trap Reduction and Performances Improvements Study after High Pressure Anneal Process on Single Crystal Channel 3D NAND Devices A. Subirats, A. Arreghini, Romain Delhougne, Eveline Rosseel, Andriy Hikavyy, L. Breuil, Senthil Vadakupudhu Palayam, G. Van den bosch, D. Linten, A. Furnémont	2018	14
18	Characterization of the spatial charge distribution in local charge-trapping memory devices using the charge-pumping technique Solid-State Electronics ·M. Rosmeulen, L. Breuil, M. Lorenzini, L. Haspeslagh, Jan Van Houdt, K. De Meyer	2004	13
19	First demonstration of monocrystalline silicon macaroni channel for 3-D NAND memory devices Romain Delhougne, A. Arreghini, Erik Rosseel, Andriy Hikavyy, E. Vecchio, L. Zhang, Murat Pak, Laura Nyns, T. Raymaekers, N. Jossart, L. Breuil, S. S. V-Palayam, C.-L. Tan, G. Van den bosch, A. Furnémont	2018	12
20	O<inf>2</inf> post deposition anneal of Al<inf>2</inf>O<inf>3</inf> blocking dielectric for higher performance and reliability of TANOS Flash memory A. Rothschild, L. Breuil, G. Van den bosch, Olivier Richard, Thierry Conard, Alexis Franquet, A. Cacciato, I. Debusschere, M. Jurczak, Jan Van Houdt, J. A. Kittl, Udayan Ganguly, L. Daté, Pieter Boelen, R. Schreutelkamp	2009	11

About L. Breuil

L. Breuil is a scholar working on Electrical and Electronic Engineering, Computer Networks and Communications, Materials Chemistry, Electronic, Optical and Magnetic Materials and Atomic and Molecular Physics, and Optics, having authored 70 papers that have together received 657 indexed citations. Recurring topics across this work include Semiconductor materials and devices (68 papers), Advanced Memory and Neural Computing (29 papers), Advanced Data Storage Technologies (21 papers), Advancements in Semiconductor Devices and Circuit Design (19 papers), Ferroelectric and Negative Capacitance Devices (16 papers), Integrated Circuits and Semiconductor Failure Analysis (11 papers), Electronic and Structural Properties of Oxides (10 papers) and Copper Interconnects and Reliability (8 papers). The work is most often cited by research in Electrical and Electronic Engineering (640 citations), Computer Networks and Communications (115 citations), Materials Chemistry (198 citations), Electronic, Optical and Magnetic Materials (39 citations) and Hardware and Architecture (5 citations). L. Breuil has collaborated with scholars based in Belgium, United Kingdom and United States. Frequent co-authors include Jan Van Houdt, G. Van den bosch, A. Cacciato, A. Arreghini, Pieter Blomme, A. Furnémont, J. G. Lisoni, K. De Meyer, R. Degraeve and M. Rosmeulen. Their work appears in journals such as IEEE Electron Device Letters, IEEE Transactions on Electron Devices, Microelectronic Engineering, Solid-State Electronics and Applied Physics Letters.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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