K.Y. Chiu

485 citations

27 papers · 334 indexed · h-index 10

Electrical and Electronic Engineering top 10%
- Semiconductor materials and devices 24
- Advancements in Semiconductor Devices and Circuit Design 16
- Integrated Circuits and Semiconductor Failure Analysis 13
- Silicon and Solar Cell Technologies 4
- Silicon Carbide Semiconductor Technologies 2
Atomic and Molecular Physics, and Optics
- Semiconductor materials and interfaces 5
Materials Chemistry
Electronic, Optical and Magnetic Materials
- Copper Interconnects and Reliability 2
Hardware and Architecture
Biomedical Engineering
- Advanced Surface Polishing Techniques 2

Co-authors: Fu‐Lan Hsu J.L. Moll Tetsuya Iizuka T. R. Cass Paul Merchant Sarah Angelos Craig Lage Runchen Fang
Cited by: Electrical and Electronic Engineering Atomic and Molecular Physics, and Optics Materials Chemistry
Journals: IEEE Transactions on Electron Devices (6 papers)IEEE Electron Device Letters (5 papers)IEEE Journal of Solid-State Circuits (1 paper)
Partner nations: United States Japan Taiwan

In The Last Decade

K.Y. Chiu

23 papers receiving 313 citations

Peers

Countries citing papers authored by K.Y. Chiu

Since Specialization

Citations

This map shows the geographic impact of K.Y. Chiu's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by K.Y. Chiu with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites K.Y. Chiu more than expected).

Fields of papers citing papers by K.Y. Chiu

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by K.Y. Chiu. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by K.Y. Chiu. The network helps show where K.Y. Chiu may publish in the future.

Co-authorship network

The 25 scholars most cited alongside K.Y. Chiu, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with K.Y. Chiu Line = papers co-authored together K.Y. Chiu links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

#	Work
1	Selective CVD tungsten as an alternative to blanket tungsten for submicron plug applications on VLSI circuits M. L. Sheely,J. E. Turner,K. Nauka,K.Y. Chiu	2002	0
2	Improved flash cell performance by N/sub 2/O annealing of interpoly oxide IEEE Electron Device Letters ·胡从伟,Carlos Hernández Hidalgo,Tien‐Sheng Chao,原田尚美,Len-Yi Leu,K.K. Young,Chen-Hsi Lin,K.Y. Chiu	1997	7
3	A Radiation-Hard Flash Cell Using Horn-Shaped Floating Gate and N2O Annealing 胡从伟,Jaidilson Jó da Silva,Tien‐Sheng Chao,Horng‐Chih Lin,Len-Yi Leu,K.K. Young,Chen-Hsi Lin,K.Y. Chiu	1997	1
4	Design optimization methodology for deep-submicrometer CMOS device at low-temperature operation IEEE Transactions on Electron Devices ·M. Kakumu,Dethard Peters,María del Carmen Sánchez Vicente,K.Y. Chiu	1992	4
5	A Novel Double-Self-Alicned TiSi2/TiN Contact with Selective Cvd W Plug for Submicron Device and Interconnect Applications Daiva Nielsen,M. L. Sheely,Apoyo a la investigación Uam,K.Y. Chiu	1991	0
6	Effects of titanium salicide process on MOSFET characteristics IEEE Transactions on Electron Devices ·Danu Yahya,K.Y. Chiu	1989	1
7	Effects of Titanium Salicide Process on Oxide Charge Trapping and Hot-Electron Reliability in Submicron MOS Devices for VLSI Symposium on VLSI Technology ·Danu Yahya,K.Y. Chiu	1987	0
8	HPSAC—A silicided amorphous-silicon contact and interconnect technology for VLSI IEEE Transactions on Electron Devices ·S.S. Wong,V. Pandorfi,Paul Merchant,T. R. Cass,Jun Amano,K.Y. Chiu	1987	21
9	TiSi₂thickness limitations for use with shallow junctions and SWAMI or LOCOS isolation IEEE Transactions on Electron Devices ·WC Ketchie,T. R. Cass,J. E. Turner,Paul Merchant,K.Y. Chiu	1986	15
10	Effects of Device Processing on Hot-Electron Induced Device Degradation Symposium on VLSI Technology ·Fu-Chieh Hsu,K.Y. Chiu	1985	1
11	Hot-electron degradation in submicron VLSI Fu-Chieh Hsu,Hou Y.J.,K.Y. Chiu	1985	9
12	The impact of TiSi2 on shallow junctions WC Ketchie,T. R. Cass,J. E. Turner,Paul Merchant,K.Y. Chiu	1985	5
13	Temperature dependence of hot-electron-induced degradation in MOSFET's IEEE Electron Device Letters ·Fu‐Lan Hsu,K.Y. Chiu	1984	73
14	Evaluation of LDD MOSFET's based on hot-electron-induced degradation IEEE Electron Device Letters ·Fu‐Lan Hsu,K.Y. Chiu	1984	33
15	Defect Characteristics and Generation Mechanism in a Bird Beak Free Structure by Sidewall Masked Technique Journal of The Electrochemical Society ·Runchen Fang,K.Y. Chiu,J.L. Moll	1983	6
16	The sloped-wall SWAMI—A defect-free zero bird's-beak local oxidation process for scaled VLSI technology IEEE Transactions on Electron Devices ·K.Y. Chiu,J.L. Moll,Kit Man Cham,J Sanchez Rivera,Craig Lage,Sarah Angelos,Honggang	1983	25
17	The SWAMI - A Defect Free and Near-Zero Bird's Beak Local Oxidation Technology for VLSI Symposium on VLSI Technology ·K.Y. Chiu,Runchen Fang,O. Balabanian,J.L. Moll	1982	2
18	The SWAMI - A defect free and near-zero bird's-beak local oxidation process and its application in VLSI technology K.Y. Chiu,Runchen Fang,O. Balabanian,J.L. Moll,Craig Lage,Sarah Angelos,Honggang	1982	9
19	A bird's beak free local oxidation technology feasible for VLSI circuits fabrication IEEE Transactions on Electron Devices ·K.Y. Chiu,J.L. Moll,Shi-Yang Zhou	1982	54
20	Radiation Effects on Semiconductor Materials and Devices. Defense Technical Information Center (DTIC) ·J. R. Srour,O. L. Curtis,Agus Gusnandjar,K.Y. Chiu,Gulibusitan Aierkentai	1973	4

About K.Y. Chiu

K.Y. Chiu is a scholar working on Electrical and Electronic Engineering, Instrumentation, Atomic and Molecular Physics, and Optics, Electronic, Optical and Magnetic Materials and Condensed Matter Physics, having authored 27 papers that have together received 334 indexed citations. Recurring topics across this work include Semiconductor materials and devices (24 papers), Advancements in Semiconductor Devices and Circuit Design (16 papers), Integrated Circuits and Semiconductor Failure Analysis (13 papers), Semiconductor materials and interfaces (5 papers), Silicon and Solar Cell Technologies (4 papers), Copper Interconnects and Reliability (2 papers), Advanced Surface Polishing Techniques (2 papers) and Silicon Carbide Semiconductor Technologies (2 papers). The work is most often cited by research in Electrical and Electronic Engineering (325 citations), Atomic and Molecular Physics, and Optics (56 citations), Materials Chemistry (26 citations), Electronic, Optical and Magnetic Materials (9 citations) and Hardware and Architecture (3 citations). K.Y. Chiu has collaborated with scholars based in United States, Japan and Taiwan. Frequent co-authors include Fu‐Lan Hsu, J.L. Moll, Tetsuya Iizuka, T. R. Cass, Paul Merchant, Sarah Angelos, Craig Lage, Runchen Fang, Kit Man Cham and Fu-Chieh Hsu. Their work appears in journals such as IEEE Transactions on Electron Devices, IEEE Electron Device Letters, IEEE Journal of Solid-State Circuits, IEEE Transactions on Semiconductor Manufacturing and Journal of The Electrochemical Society.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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