J.L. Pelloie

1.1k total citations
72 papers, 780 citations indexed

About

J.L. Pelloie is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Biomedical Engineering. According to data from OpenAlex, J.L. Pelloie has authored 72 papers receiving a total of 780 indexed citations (citations by other indexed papers that have themselves been cited), including 70 papers in Electrical and Electronic Engineering, 6 papers in Hardware and Architecture and 4 papers in Biomedical Engineering. Recurrent topics in J.L. Pelloie's work include Advancements in Semiconductor Devices and Circuit Design (64 papers), Semiconductor materials and devices (57 papers) and Integrated Circuits and Semiconductor Failure Analysis (24 papers). J.L. Pelloie is often cited by papers focused on Advancements in Semiconductor Devices and Circuit Design (64 papers), Semiconductor materials and devices (57 papers) and Integrated Circuits and Semiconductor Failure Analysis (24 papers). J.L. Pelloie collaborates with scholars based in France, United States and Taiwan. J.L. Pelloie's co-authors include V. Ferlet-Cavrois, O. Musseau, F. Balestra, C. Raynaud, J.L. Leray, O. Faynot, O. Flament, S. Cristoloveanu, N. Fel and Daniel Pasquet and has published in prestigious journals such as Journal of Applied Physics, IEEE Transactions on Electron Devices and Solid-State Electronics.

In The Last Decade

J.L. Pelloie

66 papers receiving 738 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
J.L. Pelloie France	14	771	33	32	31	27	72	780
K. Watson United States	10	310 0.4×	28 0.8×	24 0.8×	20 0.6×	16 0.6×	18	318
B.M. Haugerud United States	11	331 0.4×	37 1.1×	19 0.6×	45 1.5×	18 0.7×	18	342
A. Koukab Switzerland	8	273 0.4×	67 2.0×	9 0.3×	22 0.7×	22 0.8×	23	297
John A. Modolo United States	5	324 0.4×	20 0.6×	17 0.5×	20 0.6×	22 0.8×	9	331
M. Simons United States	13	333 0.4×	6 0.2×	17 0.5×	28 0.9×	30 1.1×	30	343
Jung-Suk Goo United States	13	616 0.8×	87 2.6×	13 0.4×	89 2.9×	44 1.6×	43	626
G. Freeman United States	13	527 0.7×	79 2.4×	27 0.8×	90 2.9×	41 1.5×	36	555
M.R. Polcari United States	12	459 0.6×	42 1.3×	15 0.5×	72 2.3×	16 0.6×	22	468
G. Chindalore United States	10	384 0.5×	25 0.8×	6 0.2×	103 3.3×	36 1.3×	17	390
Adilson S. Cardoso United States	12	304 0.4×	19 0.6×	29 0.9×	39 1.3×	8 0.3×	31	316

Countries citing papers authored by J.L. Pelloie

Since Specialization

Citations

This map shows the geographic impact of J.L. Pelloie's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by J.L. Pelloie with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites J.L. Pelloie more than expected).

Fields of papers citing papers by J.L. Pelloie

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by J.L. Pelloie. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by J.L. Pelloie. The network helps show where J.L. Pelloie may publish in the future.

Co-authorship network of co-authors of J.L. Pelloie

This figure shows the co-authorship network connecting the top 25 collaborators of J.L. Pelloie. A scholar is included among the top collaborators of J.L. Pelloie based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with J.L. Pelloie. J.L. Pelloie is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

Tong, Jonathan, et al.. (2009). ARM 1176 implementation in SOI 45nm technology and silicon measurement. 1–4. 1 indexed citations

Chiang, Wen-Tai, et al.. (2008). Optimal PD-SOI Technology for High Performance Applications. 93–94. 1 indexed citations

Chiang, Wen-Tai, et al.. (2007). Circuit Performance Optimization in Advanced PD-SOI CMOS Development. 73–74. 2 indexed citations

Pelloie, J.L.. (2006). Using SOI to Achieve Low-Power Consumption in Digital. 14–17. 5 indexed citations

Pelloie, J.L., et al.. (2003). SOI technology performance and modelling. 428–429. 5 indexed citations

Raynaud, C., et al.. (2002). Fully-depleted accumulation-mode PMOSFET for 0.2 μm SOI technology. 12–13.

Raynaud, C., O. Faynot, J.L. Pelloie, et al.. (2002). 0.25 μm fully depleted SOI MOSFETs for RF mixed analog-digital circuits, including a comparison with partially depleted devices with relation to high frequency noise parameters. Solid-State Electronics. 46(3). 379–386. 12 indexed citations

Jenkins, K.A., J.Y.-C. Sun, & J.L. Pelloie. (2002). Measurement of SOI MOSFET I-V characteristics without self-heating. 121–122. 1 indexed citations

Pelloie, J.L., et al.. (2002). Hot-carrier effects in deep submicron thin film SOI MOSFETs. 877–880. 1 indexed citations

10.

Fenouillet-Béranger, C., et al.. (2001). Characterization and simulation of STI isolation for 0.1 /spl mu/m partially-depleted SOI devices. 87–88. 1 indexed citations

11.

Fenouillet-Béranger, C., O. Faynot, J. de Pontcharra, et al.. (2001). Characterization and simulation of the parasitic BJT in 0.1um partially-depleted SOI devices. 339–342.

12.

Ferlet-Cavrois, V., et al.. (2000). A New Approach for SOI Devices Small-Signal Parameters Extraction. Analog Integrated Circuits and Signal Processing. 25(2). 157–169. 69 indexed citations

13.

Ernst, T., Daniela Munteanu, S. Cristoloveanu, et al.. (1999). Detailed Analysis of Short-Channel SOI DT-MOSFET. European Solid-State Device Research Conference. 1. 380–383. 6 indexed citations

14.

Faynot, O., et al.. (1999). Comparative Analysis of SOI Floating-Body and DTMOS with Bulk Devices for 1V Operation. 2 indexed citations

15.

Pelloie, J.L., Philippe Flatresse, O. Faynot, & C. Raynaud. (1998). Comprehensive Study and Analytical Modeling of Sub-0.25 um Dynamic Threshold Voltage MOSFET (DTMOS) for Low-Voltage and Low-Power Applications. European Solid-State Device Research Conference. 280–283. 1 indexed citations

16.

Raynaud, C., et al.. (1998). Comparison of hot-carrier effects in deep submicron N- and P-channel partially- and fully-depleted Unibond and SIMOX MOSFETs. 203–208. 3 indexed citations

17.

Pelloie, J.L., et al.. (1997). On the determination of the time-dependent degradation laws in deep submicron SOI MOSFETs. European Solid-State Device Research Conference. 696–699. 2 indexed citations

18.

Jomaah, J., et al.. (1996). Impact of Latch Phenomenon on Low Frequency Noise in SOI MOSFETs. 87–90. 2 indexed citations

19.

Dentan, M., E. Delagnes, N. Fourches, et al.. (1993). Study of a CMOS-JFET-bipolar radiation hard analog-digital technology suitable for high energy physics electronics. IEEE Transactions on Nuclear Science. 40(6). 1555–1560. 27 indexed citations

20.

Pelloie, J.L., et al.. (1986). A study of deep levels by transient spectroscopy on p-type liquid-phase-epitaxial GaxIn1−xAsyP1−y grown on semi-insulating InP. Journal of Applied Physics. 59(5). 1536–1543. 13 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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