J. Khare

592 total citations
35 papers, 437 citations indexed

About

J. Khare is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Industrial and Manufacturing Engineering. According to data from OpenAlex, J. Khare has authored 35 papers receiving a total of 437 indexed citations (citations by other indexed papers that have themselves been cited), including 29 papers in Electrical and Electronic Engineering, 27 papers in Hardware and Architecture and 13 papers in Industrial and Manufacturing Engineering. Recurrent topics in J. Khare's work include VLSI and Analog Circuit Testing (27 papers), Integrated Circuits and Semiconductor Failure Analysis (21 papers) and VLSI and FPGA Design Techniques (10 papers). J. Khare is often cited by papers focused on VLSI and Analog Circuit Testing (27 papers), Integrated Circuits and Semiconductor Failure Analysis (21 papers) and VLSI and FPGA Design Techniques (10 papers). J. Khare collaborates with scholars based in United States, Germany and Netherlands. J. Khare's co-authors include W. Maly, D.B.I. Feltham, D. Schmitt‐Landsiedel, P. K. Nag, Michael E. Thomas, M. d'Abreu, Janusz Rajski, C. Ou-Yang, Witold A. Pleskacz and A. Raman and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Semiconductor Manufacturing and Quality and Reliability Engineering International.

In The Last Decade

J. Khare

31 papers receiving 401 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
J. Khare United States 14 383 337 79 22 18 35 437
Huaxing Tang United States 13 497 1.3× 488 1.4× 75 0.9× 52 2.4× 6 0.3× 28 519
B. Kruseman Netherlands 14 576 1.5× 516 1.5× 14 0.2× 31 1.4× 6 0.3× 35 600
S. Eichenberger Netherlands 12 543 1.4× 509 1.5× 19 0.2× 22 1.0× 8 0.4× 25 567
G.A. Allan United Kingdom 10 260 0.7× 224 0.7× 46 0.6× 5 0.2× 23 1.3× 32 298
D. Appello Italy 12 340 0.9× 344 1.0× 35 0.4× 52 2.4× 15 0.8× 56 403
G. Gronthoud Netherlands 12 447 1.2× 429 1.3× 11 0.1× 35 1.6× 11 0.6× 26 470
W. Needham United States 7 355 0.9× 326 1.0× 9 0.1× 30 1.4× 9 0.5× 9 371
Koen Lampaert Belgium 11 600 1.6× 423 1.3× 21 0.3× 8 0.4× 16 0.9× 20 625
Kazumi Hatayama Japan 11 290 0.8× 261 0.8× 6 0.1× 16 0.7× 21 1.2× 52 332
Haitong Tian United States 12 347 0.9× 190 0.6× 17 0.2× 4 0.2× 26 1.4× 21 358

Countries citing papers authored by J. Khare

Since Specialization
Citations

This map shows the geographic impact of J. Khare's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by J. Khare with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites J. Khare more than expected).

Fields of papers citing papers by J. Khare

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by J. Khare. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by J. Khare. The network helps show where J. Khare may publish in the future.

Co-authorship network of co-authors of J. Khare

This figure shows the co-authorship network connecting the top 25 collaborators of J. Khare. A scholar is included among the top collaborators of J. Khare based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with J. Khare. J. Khare is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Khare, J.. (2005). Memory yield improvement - SoC design perspective. 1445–1445. 2 indexed citations
2.
Maly, W., et al.. (2002). Design-manufacturing interface. II. Applications [VLSI]. 557–562. 3 indexed citations
3.
Ou-Yang, C., et al.. (2002). Wire planning for performance and yield enhancement. 113–116. 2 indexed citations
4.
Rajski, Janusz, et al.. (2002). Enabling embedded memory diagnosis via test response compression. 16 indexed citations
5.
Khare, J., et al.. (2002). Key attributes of an SRAM testing strategy required for effective process monitoring. 32. 84–89. 8 indexed citations
6.
Khare, J., et al.. (2002). Defect-based testing for fabless companies. 23–29.
7.
Maly, W., et al.. (2002). Design-manufacturing interface. I. Vision [VLSI]. 550–556. 3 indexed citations
8.
Khare, J., et al.. (2002). SRAM-based extraction of defect characteristics. 98–107. 8 indexed citations
9.
Khare, J., et al.. (2002). Manufacturability analysis of standard cell libraries. 321–324. 18 indexed citations
10.
Gaitonde, Dinesh, et al.. (2002). Estimation of reject ratio in testing of combinatorial circuits. 5. 319–325. 4 indexed citations
11.
12.
Khare, J., et al.. (2002). Yield loss forecasting in the early phases of the VLSI design process. 27–30. 18 indexed citations
13.
Khare, J. & W. Maly. (2002). Inductive contamination analysis (ICA) with SRAM application. 552–560. 18 indexed citations
14.
Maly, W., et al.. (1998). Design-manufacturing interface: Part II - applications. 557–562. 9 indexed citations
15.
Maly, W., et al.. (1996). Design for manufacturability in submicron domain. International Conference on Computer Aided Design. 690–697. 33 indexed citations
16.
Khare, J. & W. Maly. (1996). Rapid failure analysis using contamination-defect-fault (CDF) simulation. IEEE Transactions on Semiconductor Manufacturing. 9(4). 518–526. 8 indexed citations
17.
Khare, J., et al.. (1995). Yield-oriented computer-aided defect diagnosis. IEEE Transactions on Semiconductor Manufacturing. 8(2). 195–206. 50 indexed citations
18.
Schmitt‐Landsiedel, D., et al.. (1995). Critical area analysis for design‐based yield improvement of vlsi circuits. Quality and Reliability Engineering International. 11(4). 227–232. 5 indexed citations
19.
Khare, J., D.B.I. Feltham, & W. Maly. (1993). Accurate estimation of defect-related yield loss in reconfigurable VLSI circuits. IEEE Journal of Solid-State Circuits. 28(2). 146–156. 43 indexed citations
20.
Feltham, D.B.I., J. Khare, & W. Maly. (1992). Design for testability view on placement and routing. European Design Automation Conference. 382–387. 7 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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