F. Cacho
-
- Semiconductor materials and devices 67
- Advancements in Semiconductor Devices and Circuit Design 56
- Integrated Circuits and Semiconductor Failure Analysis 38
- Low-power high-performance VLSI design 10
- Electrostatic Discharge in Electronics 10
- Radio Frequency Integrated Circuit Design 7
- Silicon and Solar Cell Technologies 7
- Hardware and Architecture top 10%
- VLSI and Analog Circuit Testing 8
- Cited by
- Electrical and Electronic EngineeringHardware and ArchitectureElectronic, Optical and Magnetic Materials
- Journals
- Microelectronics Reliability (10 papers)IEEE Transactions on Device and Materials Reliability (2 papers)Microelectronic Engineering (2 papers)
- Partner nations
- FranceIndiaSwitzerland
In The Last Decade
F. Cacho
85 papers receiving 614 citations
Peers
Comparison fields: 5 of 32
- Electrical and Electronic Engineering 595
- Hardware and Architecture 63
- Electronic, Optical and Magnetic Materials 47
- Instrumentation 8
- Condensed Matter Physics 13
Countries citing papers authored by F. Cacho
This map shows the geographic impact of F. Cacho's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by F. Cacho with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites F. Cacho more than expected).
Fields of papers citing papers by F. Cacho
This network shows the impact of papers produced by F. Cacho. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by F. Cacho. The network helps show where F. Cacho may publish in the future.
Co-authorship network
The 25 scholars most cited alongside F. Cacho, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | 2024 | 0 | |
| 2 | 2024 | 1 | |
| 3 | 2023 | 2 | |
| 4 | 2023 | 1 | |
| 5 | 2023 | 3 | |
| 6 | 2022 | 5 | |
| 7 | 2022 | 5 | |
| 8 | 2022 | 6 | |
| 9 | 2021 | 1 | |
| 10 | 2019 | 11 | |
| 11 | 2018 | 4 | |
| 12 | 2017 | 1 | |
| 13 | 2014 | 0 | |
| 14 | 2013 | 1 | |
| 15 | 2011 | 4 | |
| 16 | 2011 | 3 | |
| 17 | 2010 | 1 | |
| 18 | 2010 | 28 | |
| 19 | 2009 | 6 | |
| 20 | 2009 | 15 |
About F. Cacho
F. Cacho is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Instrumentation, having authored 92 papers that have together received 623 indexed citations. Recurring topics across this work include Semiconductor materials and devices (67 papers), Advancements in Semiconductor Devices and Circuit Design (56 papers), Integrated Circuits and Semiconductor Failure Analysis (38 papers), Low-power high-performance VLSI design (10 papers), Electrostatic Discharge in Electronics (10 papers), VLSI and Analog Circuit Testing (8 papers), Radio Frequency Integrated Circuit Design (7 papers) and Silicon and Solar Cell Technologies (7 papers). The work is most often cited by research in Electrical and Electronic Engineering (595 citations), Hardware and Architecture (63 citations) and Electronic, Optical and Magnetic Materials (47 citations). F. Cacho has collaborated with scholars based in France, India and Switzerland. Frequent co-authors include X. Federspiel, V. Huard, A. Bravaix, D. Roy, M. Rafik, A. Bajolet, A. Cros, Lorena Anghel, X. Garros and G. Ghibaudo. Their work appears in journals such as Microelectronics Reliability, IEEE Transactions on Device and Materials Reliability, Microelectronic Engineering, Materials Science and Engineering B and IEEE Journal of Solid-State Circuits.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.