Chuck Yuan

493 total citations
40 papers, 363 citations indexed

About

Chuck Yuan is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Biomedical Engineering. According to data from OpenAlex, Chuck Yuan has authored 40 papers receiving a total of 363 indexed citations (citations by other indexed papers that have themselves been cited), including 40 papers in Electrical and Electronic Engineering, 10 papers in Hardware and Architecture and 5 papers in Biomedical Engineering. Recurrent topics in Chuck Yuan's work include Electromagnetic Compatibility and Noise Suppression (24 papers), Advancements in PLL and VCO Technologies (22 papers) and Low-power high-performance VLSI design (12 papers). Chuck Yuan is often cited by papers focused on Electromagnetic Compatibility and Noise Suppression (24 papers), Advancements in PLL and VCO Technologies (22 papers) and Low-power high-performance VLSI design (12 papers). Chuck Yuan collaborates with scholars based in United States, India and Iran. Chuck Yuan's co-authors include W.T. Beyene, Dan Oh, Hai Lan, Sam Chang, Joong-Ho Kim, Kambiz Kaviani, Jihong Ren, Hao Shi, Kyung Suk Oh and Jared Zerbe and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Advanced Packaging and Analog Integrated Circuits and Signal Processing.

In The Last Decade

Chuck Yuan

37 papers receiving 334 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Chuck Yuan United States 11 342 70 35 31 18 40 363
S. Bobba United States 10 373 1.1× 150 2.1× 23 0.7× 46 1.5× 3 0.2× 19 389
Jung-Hwan Choi South Korea 9 229 0.7× 53 0.8× 31 0.9× 41 1.3× 6 0.3× 51 255
Qingjian Yu United States 8 240 0.7× 52 0.7× 13 0.4× 26 0.8× 28 1.6× 24 293
K.B. Hardin United States 8 433 1.3× 13 0.2× 22 0.6× 39 1.3× 14 0.8× 15 454
Chirayu Amin United States 11 379 1.1× 225 3.2× 18 0.5× 33 1.1× 2 0.1× 18 396
W.H. Kao United States 9 258 0.8× 171 2.4× 14 0.4× 22 0.7× 2 0.1× 24 295
Jean-Marc Daveau France 9 184 0.5× 97 1.4× 28 0.8× 29 0.9× 1 0.1× 26 218
Juhyun Park South Korea 9 315 0.9× 69 1.0× 18 0.5× 26 0.8× 31 356
P. Pant United States 13 418 1.2× 253 3.6× 21 0.6× 27 0.9× 24 449
D.W. Stout United States 6 265 0.8× 178 2.5× 89 2.5× 25 0.8× 10 317

Countries citing papers authored by Chuck Yuan

Since Specialization
Citations

This map shows the geographic impact of Chuck Yuan's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Chuck Yuan with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Chuck Yuan more than expected).

Fields of papers citing papers by Chuck Yuan

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Chuck Yuan. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Chuck Yuan. The network helps show where Chuck Yuan may publish in the future.

Co-authorship network of co-authors of Chuck Yuan

This figure shows the co-authorship network connecting the top 25 collaborators of Chuck Yuan. A scholar is included among the top collaborators of Chuck Yuan based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Chuck Yuan. Chuck Yuan is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Yuan, Chuck, et al.. (2025). A Compact Low-Power 16 b SAR ADC Using Reservoir-Charge-Redistributed DAC and Configurable FIA-Based Comparator. IEEE Journal of Solid-State Circuits. 60(10). 3498–3511. 1 indexed citations
2.
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Kim, Joong-Ho, et al.. (2009). Challenges and solutions for next generation main memory systems. 93–96. 9 indexed citations
5.
Kim, Joong-Ho, Dan Oh, W.T. Beyene, et al.. (2009). Design of low cost QFP packages for multi-gigabit memory interface. 1662–1669. 2 indexed citations
6.
Beyene, W.T., et al.. (2008). Design and analysis of a TB/sec memory system. 21–24. 5 indexed citations
7.
Oh, Kyung Suk, Sam Chang, Jihong Ren, et al.. (2008). Accurate System Voltage and Timing Margin Simulation in High-Speed I/O System Designs. IEEE Transactions on Advanced Packaging. 31(4). 722–730. 37 indexed citations
8.
Chang, Sam, et al.. (2007). Jitter Amplification Considerations for PCB Clock Channel Design. 135–138. 15 indexed citations
9.
Kim, Joong-Ho, Dan Oh, Jun‐e Feng, et al.. (2007). Performance Impact of Simultaneous Switching Output Noise on Graphic Memory Systems. 197–200. 20 indexed citations
10.
Oh, Dan, et al.. (2007). Prediction of System Performance Based on Component Jitter and Noise Budgets. 33–36. 13 indexed citations
11.
Kim, Joong-Ho, et al.. (2006). S-parameters Based Transmission Line Modeling with Accurate Low-Frequency Response. 19. 79–82. 11 indexed citations
12.
Kim, Joong-Ho, et al.. (2006). Power Delivery Design for 800MHz DDR2 Memory Systems in Low-Cost Wire-Bond Packages. 222–228. 4 indexed citations
13.
Shi, Hao, et al.. (2006). Study of Electrical Performance of Flip-Chip Package Via Designs for Gigahertz Applications. 26. 261–264. 2 indexed citations
14.
Beyene, W.T., et al.. (2005). Performance analysis of multi-gigahertz parallel bus with transmit pre-emphasis equalization. IEEE MTT-S International Microwave Symposium Digest, 2005.. 1849–1852. 10 indexed citations
15.
Chang, Ken, Sudhakar Pamarti, Kambiz Kaviani, et al.. (2005). Clocking and circuit design for a parallel I/O on a first-generation CELL processor. 526–528. 45 indexed citations
16.
Beyene, W.T., Hao Shi, Jiagui Feng, & Chuck Yuan. (2004). Design and analysis methodologies of a 6.4 Gb/s memory interconnect system using conventional packaging and board technologies. 1406–1411. 8 indexed citations
17.
Beyene, W.T., Ning Cheng, & Chuck Yuan. (2003). Design and analysis of multi-gigahertz parallel bus interfaces of low-cost and band-limited channels. 213–216. 2 indexed citations
18.
Huang, Ching-Chao, et al.. (2003). Physical layer design of a 1.6 GB/s DRAM bus. 11–14. 5 indexed citations
19.
Beyene, W.T., et al.. (2002). Design and verification of differential transmission lines. 85–88. 17 indexed citations
20.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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2026