M. Kanazawa
- Electrical and Electronic Engineering
- Hardware and Architecture top 5%
- Biomedical Engineering
- Computer Networks and Communications
- Signal Processing
- Co-authors
- Kimiyoshi UsamiTakashi IshikawaM. IgarashiMasafumi TakahashiTadahiro KurodaHideho ArakidaT. TerazawaM. Hamada
- Topics
- Low-power high-performance VLSI design (8 papers)VLSI and FPGA Design Techniques (3 papers)Analog and Mixed-Signal Circuit Design (3 papers)
- Journals
- IEEE Journal of Solid-State CircuitsIPSJ SIG Notes
- Partner nations
- JapanSouth Korea
In The Last Decade
M. Kanazawa
10 papers receiving 295 citations
Peers
Comparison fields: 5 of 20
- Electrical and Electronic Engineering 294
- Hardware and Architecture 127
- Biomedical Engineering 53
- Computer Networks and Communications 51
- Signal Processing 37
Countries citing papers authored by M. Kanazawa
This map shows the geographic impact of M. Kanazawa's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by M. Kanazawa with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites M. Kanazawa more than expected).
Fields of papers citing papers by M. Kanazawa
This network shows the impact of papers produced by M. Kanazawa. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by M. Kanazawa. The network helps show where M. Kanazawa may publish in the future.
Co-authorship network of co-authors of M. Kanazawa
This figure shows the co-authorship network connecting the top 25 collaborators of M. Kanazawa. A scholar is included among the top collaborators of M. Kanazawa based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with M. Kanazawa. M. Kanazawa is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 15 | |
| 2 | 6 | |
| 3 | 8 | |
| 4 | 67 | |
| 5 | 37 | |
| 6 | 39 | |
| 7 | 82 | |
| 8 | 60 | |
| 9 | A Multi-layer Routing System Based on Sketch Model | 2 |
| 10 | 13 |
About M. Kanazawa
M. Kanazawa is a scholar working on Hardware and Architecture, Signal Processing and Electrical and Electronic Engineering, having authored 10 papers that have together received 329 indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (8 papers), VLSI and FPGA Design Techniques (3 papers) and Analog and Mixed-Signal Circuit Design (3 papers). The work is most often cited by research in Hardware and Architecture (127 citations), Electrical and Electronic Engineering (294 citations) and Signal Processing (37 citations). M. Kanazawa has collaborated with scholars based in Japan and South Korea. Frequent co-authors include Kimiyoshi Usami, Takashi Ishikawa, M. Igarashi, Masafumi Takahashi, Tadahiro Kuroda, Hideho Arakida, T. Terazawa, M. Hamada, A. Chiba and F. Minami. Their work appears in journals such as IEEE Journal of Solid-State Circuits and IPSJ SIG Notes.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.