Frank Hannig
About
In The Last Decade
Frank Hannig
152 papers receiving 1.1k citations
Peers
Comparison fields: 5 of 60
- Hardware and Architecture 807
- Computer Networks and Communications 532
- Electrical and Electronic Engineering 333
- Computer Vision and Pattern Recognition 212
- Artificial Intelligence 95
Countries citing papers authored by Frank Hannig
This map shows the geographic impact of Frank Hannig's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Frank Hannig with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Frank Hannig more than expected).
Fields of papers citing papers by Frank Hannig
This network shows the impact of papers produced by Frank Hannig. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Frank Hannig. The network helps show where Frank Hannig may publish in the future.
Co-authorship network of co-authors of Frank Hannig
This figure shows the co-authorship network connecting the top 25 collaborators of Frank Hannig. A scholar is included among the top collaborators of Frank Hannig based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Frank Hannig. Frank Hannig is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 1 | |
| 2 | 1 | |
| 3 | 1 | |
| 4 | 2 | |
| 5 | 10 | |
| 6 | 9 | |
| 7 | Towards Actor-oriented Programming on PGAS-based Multicore Architectures | 2 |
| 8 | 14 | |
| 9 | Accuracy and performance analysis of Harris Corner computation on tightly-coupled processor arrays | 10 |
| 10 | A prototype of an invasive tightly-coupled processor array | 2 |
| 11 | An integrated simulation framework for invasive computing | 2 |
| 12 | Frameworks for Multi-core Architectures: A Comprehensive Evaluation Using 2D/3D Image Registration | 0 |
| 13 | 5 | |
| 14 | The PAULA Language for Designing Multi-Dimensional Dataflow-Intensive Applications. | 3 |
| 15 | A Unified Retargetable Design Methodology for Dedicated and Re-Programmable Multiprocessor Arrays: Case Study and Quantitative Evaluation. | 1 |
| 16 | A Dynamically Reconfigurable Weakly Programmable Processor Array Architecture Template. | 11 |
| 17 | A Generic Framework for Rapid Prototyping of System-on-Chip Designs. | 2 |
| 18 | An Architecture Description Language for Massively Parallel Processor Architectures. | 5 |
| 19 | 5 | |
| 20 | 11 |
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.