Vyacheslav Rovner

537 total citations
16 papers, 399 citations indexed

About

Vyacheslav Rovner is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Biomedical Engineering. According to data from OpenAlex, Vyacheslav Rovner has authored 16 papers receiving a total of 399 indexed citations (citations by other indexed papers that have themselves been cited), including 16 papers in Electrical and Electronic Engineering, 6 papers in Hardware and Architecture and 1 paper in Biomedical Engineering. Recurrent topics in Vyacheslav Rovner's work include Advancements in Photolithography Techniques (11 papers), VLSI and FPGA Design Techniques (10 papers) and VLSI and Analog Circuit Testing (6 papers). Vyacheslav Rovner is often cited by papers focused on Advancements in Photolithography Techniques (11 papers), VLSI and FPGA Design Techniques (10 papers) and VLSI and Analog Circuit Testing (6 papers). Vyacheslav Rovner collaborates with scholars based in United States. Vyacheslav Rovner's co-authors include Andrzej J. Strojwas, Larry Pileggi, Lawrence T. Pileggi, Lars W. Liebmann, Herman Schmit, Y. Takegawa, P. Gopalakrishnan, G. A. Northrop, Daniel Morris and Kaushik Vaidyanathan and has published in prestigious journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE.

In The Last Decade

Vyacheslav Rovner

16 papers receiving 365 citations

Peers

Countries citing papers authored by Vyacheslav Rovner

Since Specialization

Citations

This map shows the geographic impact of Vyacheslav Rovner's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Vyacheslav Rovner with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Vyacheslav Rovner more than expected).

Fields of papers citing papers by Vyacheslav Rovner

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Vyacheslav Rovner. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Vyacheslav Rovner. The network helps show where Vyacheslav Rovner may publish in the future.

Co-authorship network of co-authors of Vyacheslav Rovner

This figure shows the co-authorship network connecting the top 25 collaborators of Vyacheslav Rovner. A scholar is included among the top collaborators of Vyacheslav Rovner based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Vyacheslav Rovner. Vyacheslav Rovner is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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16 of 16 papers shown

#	Work	Indexed citations
1	Performance and manufacturability trade-offs of pattern minimization for sub-22nm technology nodes 2011 ·Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE ·Vyacheslav Rovner, (unknown), Daniel Morris, Andrzej J. Strojwas, Larry Pileggi	2
2	Application of the cost-per-good-die metric for process design co-optimization 2010 ·Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE ·(unknown), Ümüt Arslan, Vyacheslav Rovner, Andrzej J. Strojwas, Larry Pileggi	1
3	Enabling application-specific integrated circuits on limited pattern constructs 2010 ·Daniel Morris, Vyacheslav Rovner, Larry Pileggi, Andrzej J. Strojwas, Kaushik Vaidyanathan	14
4	Demonstrating the benefits of template-based design-technology co-optimization 2010 ·Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE ·Lars W. Liebmann, (unknown), (unknown), Larry Pileggi, (unknown), (unknown), Vyacheslav Rovner	1
5	Co-Optimization of Circuits, Layout and Lithography for Predictive Technology Scaling Beyond Gratings 2010 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·(unknown), Vyacheslav Rovner, Lars W. Liebmann, Larry Pileggi, Andrzej J. Strojwas, (unknown)	69
6	Economic assessment of lithography strategies for the 22nm technology node 2009 ·Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE ·(unknown), Andrzej J. Strojwas, Larry Pileggi, Vyacheslav Rovner	5
7	Creating an affordable 22nm node using design-lithography co-optimization 2009 ·Andrzej J. Strojwas, (unknown), Vyacheslav Rovner, Larry Pileggi	3
8	Simplify to survive: prescriptive layouts ensure profitable scaling to 32nm and beyond 2009 ·Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE ·Lars W. Liebmann, Larry Pileggi, (unknown), Vyacheslav Rovner, (unknown), G. A. Northrop	37
9	OPC simplification and mask cost reduction using regular design fabrics 2009 ·Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE ·(unknown), Ian Stobert, Lars W. Liebmann, (unknown), Vyacheslav Rovner, Andrzej J. Strojwas, Larry Pileggi	12
10	Enabling technology scaling with "in production" lithography processes 2008 ·Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE ·(unknown), Andrzej J. Strojwas, Larry Pileggi, Vyacheslav Rovner	7
11	Maximization of layout printability/manufacturability by extreme layout regularity 2006 ·Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE ·(unknown), Larry Pileggi, Vyacheslav Rovner, Andrzej J. Strojwas	33
12	Design Methodology of Regular Logic Bricks for Robust Integrated Circuits 2006 ·(unknown), Vyacheslav Rovner, Lawrence T. Pileggi, (unknown)	8
13	Design methodology for IC manufacturability based on regular logic-bricks 2005 ·(unknown), Vyacheslav Rovner, (unknown), (unknown), Y. Takegawa, Andrzej J. Strojwas, Lawrence T. Pileggi	26
14	Design methodology for IC manufacturability based on regular logic-bricks 2005 ·(unknown), Vyacheslav Rovner, (unknown), (unknown), Y. Takegawa, Andrzej J. Strojwas, Lawrence T. Pileggi	70
15	Regular logic fabrics for a via patterned gate array (VPGA) 2004 ·(unknown), (unknown), Vyacheslav Rovner, Lawrence T. Pileggi, Herman Schmit	27
16	Exploring regular fabrics to optimize the performance-cost trade-off 2003 ·Larry Pileggi, Herman Schmit, Andrzej J. Strojwas, P. Gopalakrishnan, (unknown), (unknown), (unknown), Vyacheslav Rovner, (unknown)	84

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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