Vincent Huard

675 total citations
24 papers, 477 citations indexed

About

Vincent Huard is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Condensed Matter Physics. According to data from OpenAlex, Vincent Huard has authored 24 papers receiving a total of 477 indexed citations (citations by other indexed papers that have themselves been cited), including 23 papers in Electrical and Electronic Engineering, 2 papers in Hardware and Architecture and 1 paper in Condensed Matter Physics. Recurrent topics in Vincent Huard's work include Semiconductor materials and devices (20 papers), Advancements in Semiconductor Devices and Circuit Design (16 papers) and Integrated Circuits and Semiconductor Failure Analysis (11 papers). Vincent Huard is often cited by papers focused on Semiconductor materials and devices (20 papers), Advancements in Semiconductor Devices and Circuit Design (16 papers) and Integrated Circuits and Semiconductor Failure Analysis (11 papers). Vincent Huard collaborates with scholars based in France, Switzerland and Japan. Vincent Huard's co-authors include A. Bravaix, C. Guérin, A. Asenov, Andrew R. Brown, Thomas Quémerais, Jean-Michel Fournier, Emmanuel Vincent, C. Parthasarathy, Thorsten Hugel and Xavier Mescot and has published in prestigious journals such as IEEE Transactions on Microwave Theory and Techniques, IEEE Transactions on Electron Devices and IEEE Electron Device Letters.

In The Last Decade

Vincent Huard

22 papers receiving 462 citations

Peers

Vincent Huard

EEE

HA

MC

AMPO

AI

A. Juge France

Chung-Hsun Lin United States

Josef Watts United States

Alessio Griffoni Belgium

Chetan Kumar Dabhi India

Vijay Reddy United States

Weiran Kong China

Simon Thomann Germany

K. Joardar United States

R. Williams United States

A. Juge France

Vincent Huard

458 ×1.0

EEE

22 ×0.6

HA

13 ×0.5

MC

27 ×2.3

AMPO

4 ×0.5

AI

Citations per year, relative to Vincent Huard Vincent Huard (= 1×) peers A. Juge

Countries citing papers authored by Vincent Huard

Since Specialization

Citations

This map shows the geographic impact of Vincent Huard's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Vincent Huard with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Vincent Huard more than expected).

Fields of papers citing papers by Vincent Huard

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Vincent Huard. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Vincent Huard. The network helps show where Vincent Huard may publish in the future.

Co-authorship network of co-authors of Vincent Huard

This figure shows the co-authorship network connecting the top 25 collaborators of Vincent Huard. A scholar is included among the top collaborators of Vincent Huard based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Vincent Huard. Vincent Huard is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

Sort: Min cites: Since: Top N: Style:

20 of 20 papers shown

1.

Ito, Takafumi, et al.. (2024). Soft-Error Tolerance by Guard-Gate Structures on Flip-Flops in 22 and 65 nm FD-SOI Technologies. IEICE Transactions on Electronics. E107.C(7). 191–200.

2.

Ito, Takafumi, et al.. (2023). Radiation Hardness Evaluations of a Stacked Flip Flop in a 22 nm FD-SOI Process by Heavy-Ion Irradiation. 1–5. 1 indexed citations

3.

Rossi, Davide, Angelo Garofalo, Alfio Di Mauro, et al.. (2023). 22.1 A 12.4TOPS/W @ 136GOPS AI-IoT System-on-Chip with 16 RISC-V, 2-to-8b Precision-Scalable DNN Acceleration and 30%-Boost Adaptive Body Biasing. Archivio istituzionale della ricerca (Alma Mater Studiorum Università di Bologna). 21–23. 21 indexed citations

4.

Ito, Takafumi, et al.. (2022). Soft-error Tolerance by Guard-Gate Structures on Flip-Flops in 22/65 nm FD-SOI Technologies. 1–5. 1 indexed citations

5.

Wane, Sidina, Damienne Bajon, & Vincent Huard. (2021). Dual Visual-Thermal Correlator Combined with Audio-Assisted mmWave FEM for Smart Sensing and Environmental Awareness. 119. 1–4. 1 indexed citations

6.

Wane, Sidina, et al.. (2019). Millimeter-Wave Beamformer Chips with Smart-Antennas for 5G: Toward Holistic RFSOI Technology Solutions including RF-ADCs. mediaTUM (Technical University of Munich). 1–4. 2 indexed citations

7.

Huard, Vincent, et al.. (2017). Workload dependent reliability timing analysis flow. 736–737. 1 indexed citations

8.

Federspiel, X., et al.. (2014). (Invited) Effect of SOI Substrate on CMOS Devices Reliability. ECS Transactions. 61(3). 127–134.

9.

Quémerais, Thomas, et al.. (2012). Design-in-Reliable Millimeter-Wave Power Amplifiers in a 65-nm CMOS Process. IEEE Transactions on Microwave Theory and Techniques. 60(4). 1079–1085. 15 indexed citations

10.

Huard, Vincent, et al.. (2011). Design-in reliability approach for Hot Carrier injection modeling in the context of AMS/RF applications. 1. 5A.5.1–5A.5.7. 3 indexed citations

11.

Huard, Vincent, et al.. (2011). Soft Oxide Breakdown impact on the functionality of a 40 nm SRAM memory. CR.3.1–CR.3.2. 5 indexed citations

12.

Cacho, F., et al.. (2011). 250 GHz heterojunction bipolar transistor: From DC to AC reliability. ed 30. 4E.5.1–4E.5.5. 1 indexed citations

13.

Quémerais, Thomas, et al.. (2010). Hot-Carrier Stress Effect on a CMOS 65-nm 60-GHz One-Stage Power Amplifier. IEEE Electron Device Letters. 31(9). 927–929. 25 indexed citations

14.

Huard, Vincent. (2010). Two independent components modeling for Negative Bias Temperature Instability. 33–42. 137 indexed citations

15.

Huard, Vincent, et al.. (2010). Managing SRAM reliability from bitcell to library level. 1. 655–664. 28 indexed citations

16.

Brown, Andrew R., Vincent Huard, & A. Asenov. (2010). Statistical Simulation of Progressive NBTI Degradation in a 45-nm Technology pMOSFET. IEEE Transactions on Electron Devices. 57(9). 2320–2323. 27 indexed citations

17.

Huard, Vincent, et al.. (2009). CMOS device design-in reliability approach in advanced nodes. 624–633. 55 indexed citations

18.

Guérin, C., Vincent Huard, & A. Bravaix. (2007). The Energy-Driven Hot-Carrier Degradation Modes of nMOSFETs. IEEE Transactions on Device and Materials Reliability. 7(2). 225–235. 94 indexed citations

19.

Huard, Vincent, C. Parthasarathy, A. Bravaix, et al.. (2007). Design-in-Reliability Approach for NBTI and Hot-Carrier Degradations in Advanced Nodes. IEEE Transactions on Device and Materials Reliability. 7(4). 558–570. 27 indexed citations

20.

Denais, M., et al.. (2007). New Insights Into Recovery Characteristics During PMOS NBTI and CHC Degradation. IEEE Transactions on Device and Materials Reliability. 7(1). 130–137. 10 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact