Po-Jung Sung

625 total citations
25 papers, 341 citations indexed

About

Po-Jung Sung is a scholar working on Electrical and Electronic Engineering, Atomic and Molecular Physics, and Optics and Biomedical Engineering. According to data from OpenAlex, Po-Jung Sung has authored 25 papers receiving a total of 341 indexed citations (citations by other indexed papers that have themselves been cited), including 25 papers in Electrical and Electronic Engineering, 6 papers in Atomic and Molecular Physics, and Optics and 5 papers in Biomedical Engineering. Recurrent topics in Po-Jung Sung's work include Semiconductor materials and devices (19 papers), Advancements in Semiconductor Devices and Circuit Design (11 papers) and Ferroelectric and Negative Capacitance Devices (7 papers). Po-Jung Sung is often cited by papers focused on Semiconductor materials and devices (19 papers), Advancements in Semiconductor Devices and Circuit Design (11 papers) and Ferroelectric and Negative Capacitance Devices (7 papers). Po-Jung Sung collaborates with scholars based in Taiwan, United States and Singapore. Po-Jung Sung's co-authors include Yao‐Jen Lee, Darsen D. Lu, Fu-Kuo Hsueh, Sourav De, Chun-Jung Su, Tien‐Sheng Chao, Michael Current, Chien-Ting Wu, Fu-Liang Yang and Kuo-Hsing Kao and has published in prestigious journals such as Applied Surface Science, IEEE Transactions on Electron Devices and IEEE Electron Device Letters.

In The Last Decade

Po-Jung Sung

24 papers receiving 329 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Po-Jung Sung Taiwan 12 331 73 53 26 9 25 341
Tewook Bang South Korea 9 333 1.0× 74 1.0× 109 2.1× 22 0.8× 11 1.2× 17 358
Jyi-Tsong Lin Taiwan 12 500 1.5× 37 0.5× 69 1.3× 22 0.8× 5 0.6× 124 517
Chen-Feng Hsu Taiwan 8 188 0.6× 181 2.5× 43 0.8× 34 1.3× 16 1.8× 15 262
Sayema Chowdhury United States 8 188 0.6× 239 3.3× 46 0.9× 21 0.8× 14 1.6× 17 314
Ching-Sung Ho China 6 268 0.8× 33 0.5× 43 0.8× 16 0.6× 8 0.9× 7 284
Fu-Ju Hou Taiwan 9 241 0.7× 73 1.0× 54 1.0× 42 1.6× 10 1.1× 40 263
Huimei Zhou United States 9 213 0.6× 75 1.0× 58 1.1× 14 0.5× 9 1.0× 30 253
Ruqi Han China 10 311 0.9× 67 0.9× 40 0.8× 71 2.7× 15 1.7× 45 327
Annie Kumar Singapore 12 351 1.1× 109 1.5× 77 1.5× 42 1.6× 22 2.4× 27 367
Arnab Pal United States 9 248 0.7× 247 3.4× 69 1.3× 35 1.3× 14 1.6× 19 381

Countries citing papers authored by Po-Jung Sung

Since Specialization
Citations

This map shows the geographic impact of Po-Jung Sung's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Po-Jung Sung with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Po-Jung Sung more than expected).

Fields of papers citing papers by Po-Jung Sung

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Po-Jung Sung. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Po-Jung Sung. The network helps show where Po-Jung Sung may publish in the future.

Co-authorship network of co-authors of Po-Jung Sung

This figure shows the co-authorship network connecting the top 25 collaborators of Po-Jung Sung. A scholar is included among the top collaborators of Po-Jung Sung based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Po-Jung Sung. Po-Jung Sung is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Chen, Ting‐Yu, Po-Jung Sung, Nian Lin, et al.. (2025). Surface characteristics optimization during wafer-level backside silicon removal for SOI wafers in 3D integration. Applied Surface Science. 688. 162366–162366. 1 indexed citations
2.
Lin, Yu‐Yu, Yu‐Hsuan Lin, Po-Jung Sung, et al.. (2024). Bit-Cost-Scalable 3D DRAM Architecture and Unit Cell First Demonstrated with Integrated Gate-Around and Channel-Around IGZO FETs. 1–2. 3 indexed citations
3.
4.
Tsai, Cheng‐Hsien, Yu‐Ming Chang, Po-Jung Sung, et al.. (2022). 3-D Monolithic Stacking of Complementary-FET on CMOS for Next Generation Compute-In-Memory SRAM. IEEE Journal of the Electron Devices Society. 11. 107–113. 3 indexed citations
5.
Chu, Chun-Lin, Guang-Li Luo, Yishuo Huang, et al.. (2022). Investigation on selectively etched SiGe and Si surface for Gate-All-Around CMOS devices fabrication. 1–2. 3 indexed citations
6.
De, Sourav, Franz Müller, Maximilian Lederer, et al.. (2022). Random and Systematic Variation in Nanoscale Hf0.5Zr0.5O2 Ferroelectric FinFETs: Physical Origin and Neuromorphic Circuit Implications. Frontiers in Nanotechnology. 3. 28 indexed citations
7.
De, Sourav, Darsen D. Lu, Yao‐Jen Lee, et al.. (2021). Ultra-Low Power Robust 3bit/cell Hf 0.5 Zr 0.5 O 2 Ferroelectric FinFET with High Endurance for Advanced Computing-In-Memory Technology. Symposium on VLSI Technology. 1–2. 21 indexed citations
8.
De, Sourav, et al.. (2021). Robust Binary Neural Network Operation From 233 K to 398 K via Gate Stack and Bias Optimization of Ferroelectric FinFET Synapses. IEEE Electron Device Letters. 42(8). 1144–1147. 23 indexed citations
9.
De, Sourav, et al.. (2021). Uniform Crystal Formation and Electrical Variability Reduction in Hafnium-Oxide-Based Ferroelectric Memory by Thermal Engineering. ACS Applied Electronic Materials. 3(2). 619–628. 42 indexed citations
10.
Sung, Po-Jung, Kuo-Hsing Kao, Chien-Ting Wu, et al.. (2020). Fabrication of Vertically Stacked Nanosheet Junctionless Field-Effect Transistors and Applications for the CMOS and CFET Inverters. IEEE Transactions on Electron Devices. 67(9). 3504–3509. 40 indexed citations
11.
Chen, Yi‐Ju, et al.. (2020). Well-behaved Ge n+/p shallow junction achieved by plasma immersion ion implantation. Vacuum. 180. 109528–109528. 2 indexed citations
12.
Sung, Po-Jung, Fu-Ju Hou, Fu-Kuo Hsueh, et al.. (2017). High-Performance Uniaxial Tensile Strained n-Channel JL SOI FETs and Triangular JL Bulk FinFETs for Nanoscaled Applications. IEEE Transactions on Electron Devices. 64(5). 2054–2060. 15 indexed citations
13.
Sung, Po-Jung, et al.. (2017). Ultra-Shallow Junction Formation by Monolayer Doping Process in Single Crystalline Si and Ge for Future CMOS Devices. ECS Journal of Solid State Science and Technology. 6(5). P350–P355. 13 indexed citations
14.
Hou, Fu-Ju, Po-Jung Sung, Fu-Kuo Hsueh, et al.. (2016). Suspended Diamond-Shaped Nanowire With Four {111} Facets for High-Performance Ge Gate-All-Around FETs. IEEE Transactions on Electron Devices. 63(10). 3837–3843. 4 indexed citations
15.
Lee, Yao‐Jen, Fu-Kuo Hsueh, Po-Jung Sung, et al.. (2014). Low-Temperature Microwave Annealing Processes for Future IC Fabrication—A Review. IEEE Transactions on Electron Devices. 61(3). 651–665. 56 indexed citations
16.
Lee, Yao‐Jen, et al.. (2014). Low-temperature microwave annealing processes for future IC fabrication. 1–4. 1 indexed citations
17.
Lee, Yao‐Jen, et al.. (2013). Low-Temperature Microwave Annealing for MOSFETs With High-k/Metal Gate Stacks. IEEE Electron Device Letters. 34(10). 1286–1288. 15 indexed citations
18.
Hsu, Shu‐Han, Hung‐Chih Chang, Chun-Lin Chu, et al.. (2012). Triangular-channel Ge NFETs on Si with (111) sidewall-enhanced I<inf>on</inf> and nearly defect-free channels. 23.6.1–23.6.4. 14 indexed citations
19.
Hsu, Shu‐Han, Chun-Lin Chu, Po-Jung Sung, et al.. (2011). Nearly defect-free Ge gate-all-around FETs on Si substrates. 35.2.1–35.2.4. 21 indexed citations
20.
Sung, Po-Jung, Fu-Ju Hou, Chester Ho, et al.. (2011). A novel bottom-up Ag contact (30nm diameter and 6.5 aspect ratio) technology by electroplating for 1Xnm and beyond technology. 7.6.1–7.6.4. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact

Breakdown of academic impact, for papers by Tewook Bang Breakdown of academic impact, for papers by Jyi-Tsong Lin Breakdown of academic impact, for papers by Chen-Feng Hsu Breakdown of academic impact, for papers by Sayema Chowdhury Breakdown of academic impact, for papers by Ching-Sung Ho Breakdown of academic impact, for papers by Fu-Ju Hou Breakdown of academic impact, for papers by Huimei Zhou Breakdown of academic impact, for papers by Ruqi Han Breakdown of academic impact, for papers by Annie Kumar Breakdown of academic impact, for papers by Arnab Pal
Rankless by CCL
2026