M. Igarashi

814 total citations
12 papers, 527 citations indexed

About

M. Igarashi is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Hardware and Architecture. According to data from OpenAlex, M. Igarashi has authored 12 papers receiving a total of 527 indexed citations (citations by other indexed papers that have themselves been cited), including 12 papers in Electrical and Electronic Engineering, 4 papers in Biomedical Engineering and 3 papers in Hardware and Architecture. Recurrent topics in M. Igarashi's work include Low-power high-performance VLSI design (12 papers), VLSI and FPGA Design Techniques (8 papers) and Analog and Mixed-Signal Circuit Design (4 papers). M. Igarashi is often cited by papers focused on Low-power high-performance VLSI design (12 papers), VLSI and FPGA Design Techniques (8 papers) and Analog and Mixed-Signal Circuit Design (4 papers). M. Igarashi collaborates with scholars based in Japan and South Korea. M. Igarashi's co-authors include Kimiyoshi Usami, Takashi Ishikawa, F. Minami, M. Ichida, K. Nogami, M. Kanazawa, Masafumi Takahashi, Hideho Arakida, T. Terazawa and Tadahiro Kuroda and has published in prestigious journals such as IEEE Journal of Solid-State Circuits and 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315).

In The Last Decade

M. Igarashi

11 papers receiving 481 citations

Peers

M. Igarashi
D. Liu Sweden
A. Chiba Japan
Kaijian Shi United States
K. Furuta Japan
Uming Ko United States
G. Gerosa United States
M. Matsui Japan
R.P. Preston United States
D. Liu Sweden
M. Igarashi
Citations per year, relative to M. Igarashi M. Igarashi (= 1×) peers D. Liu

Countries citing papers authored by M. Igarashi

Since Specialization
Citations

This map shows the geographic impact of M. Igarashi's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by M. Igarashi with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites M. Igarashi more than expected).

Fields of papers citing papers by M. Igarashi

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by M. Igarashi. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by M. Igarashi. The network helps show where M. Igarashi may publish in the future.

Co-authorship network of co-authors of M. Igarashi

This figure shows the co-authorship network connecting the top 25 collaborators of M. Igarashi. A scholar is included among the top collaborators of M. Igarashi based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with M. Igarashi. M. Igarashi is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

12 of 12 papers shown
1.
Igarashi, M., et al.. (2005). A diagonal interconnect architecture and its application to RISC core design. 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315). 2. 166–167. 23 indexed citations
2.
Usami, Kimiyoshi & M. Igarashi. (2002). Low-power design methodology and applications utilizing dual supply voltages. 123–128. 4 indexed citations
3.
Igarashi, M., et al.. (2002). A low-power design method using multiple supply voltages. 1 indexed citations
4.
Takahashi, Masafumi, M. Hamada, Hideho Arakida, et al.. (2002). A 60 mW MPEG4 video codec using clustered voltage scaling with variable supply-voltage scheme. 36–37. 8 indexed citations
5.
Hamada, M., Masafumi Takahashi, Hideho Arakida, et al.. (2002). A top-down low power design technique using clustered voltage scaling with variable supply-voltage scheme. 495–498. 67 indexed citations
6.
Igarashi, M., et al.. (2002). Concurrent logic and layout design system for high performance LSIs. 93. 465–468. 4 indexed citations
7.
Usami, Kimiyoshi, K. Nogami, M. Igarashi, et al.. (2002). Automated low-power technique exploiting multiple supply voltages applied to a media processor. 131–134. 37 indexed citations
8.
Usami, Kimiyoshi & M. Igarashi. (2000). Low-power design methodology and applications utilizing dual supply voltages. 123–128. 24 indexed citations
9.
Usami, Kimiyoshi, M. Igarashi, Takashi Ishikawa, et al.. (1998). Design methodology of ultra low-power MPEG4 codec core exploiting voltage scaling techniques. 483–488. 39 indexed citations
10.
Usami, Kimiyoshi, M. Igarashi, F. Minami, et al.. (1998). Automated low-power technique exploiting multiple supply voltages applied to a media processor. IEEE Journal of Solid-State Circuits. 33(3). 463–472. 178 indexed citations
11.
Takahashi, Masafumi, M. Hamada, Takafumi Nishikawa, et al.. (1998). A 60-mW MPEG4 video codec using clustered voltage scaling with variable supply-voltage scheme. IEEE Journal of Solid-State Circuits. 33(11). 1772–1780. 82 indexed citations
12.
Igarashi, M., M. Kanazawa, M. Ichida, et al.. (1997). A low-power design method using multiple supply voltages. 36–41. 60 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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