Hideho Arakida

754 total citations
18 papers, 485 citations indexed

About

Hideho Arakida is a scholar working on Signal Processing, Electrical and Electronic Engineering and Computer Networks and Communications. According to data from OpenAlex, Hideho Arakida has authored 18 papers receiving a total of 485 indexed citations (citations by other indexed papers that have themselves been cited), including 8 papers in Signal Processing, 8 papers in Electrical and Electronic Engineering and 7 papers in Computer Networks and Communications. Recurrent topics in Hideho Arakida's work include Video Coding and Compression Technologies (8 papers), Interconnection Networks and Systems (7 papers) and Parallel Computing and Optimization Techniques (6 papers). Hideho Arakida is often cited by papers focused on Video Coding and Compression Technologies (8 papers), Interconnection Networks and Systems (7 papers) and Parallel Computing and Optimization Techniques (6 papers). Hideho Arakida collaborates with scholars based in Japan, United States and South Korea. Hideho Arakida's co-authors include Masafumi Takahashi, T. Terazawa, Tadahiro Kuroda, Amin Firoozshahian, Alex Solomatnikov, Kimiyoshi Usami, Mark Horowitz, Takashi Ishikawa, Jacob Leverich and M. Kanazawa and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, ACM Transactions on Architecture and Code Optimization and ACM SIGARCH Computer Architecture News.

In The Last Decade

Hideho Arakida

18 papers receiving 449 citations

Author Peers

Peers are selected by citation overlap in the author's most active subfields. citations · hero ref

Author						Papers	Cites
Hideho Arakida	263	243	172	147	122	18	485
K. Masselos	98 0.4×	181 0.7×	114 0.7×	42 0.3×	52 0.4×	42	280
Fumihiko Sano	629 2.4×	183 0.8×	76 0.4×	70 0.5×	55 0.5×	12	721
P. Landman	698 2.7×	527 2.2×	143 0.8×	91 0.6×	42 0.3×	18	854
Minglun Gao	195 0.7×	123 0.5×	206 1.2×	46 0.3×	38 0.3×	59	342
T. Takayanagi	167 0.6×	100 0.4×	55 0.3×	77 0.5×	76 0.6×	19	266
A. van der Werf	124 0.5×	394 1.6×	241 1.4×	78 0.5×	54 0.4×	28	458
R. Mehra	329 1.3×	318 1.3×	109 0.6×	47 0.3×	11 0.1×	10	456
F.W. Hoeksema	121 0.5×	20 0.1×	134 0.8×	131 0.9×	131 1.1×	35	300
José Luís Güntzel	166 0.6×	112 0.5×	18 0.1×	126 0.9×	115 0.9×	80	287
H. Singh	237 0.9×	857 3.5×	740 4.3×	39 0.3×	45 0.4×	17	927

Countries citing papers authored by Hideho Arakida

Since Specialization

Citations

This map shows the geographic impact of Hideho Arakida's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Hideho Arakida with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Hideho Arakida more than expected).

Fields of papers citing papers by Hideho Arakida

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Hideho Arakida. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Hideho Arakida. The network helps show where Hideho Arakida may publish in the future.

Co-authorship network of co-authors of Hideho Arakida

This figure shows the co-authorship network connecting the top 25 collaborators of Hideho Arakida. A scholar is included among the top collaborators of Hideho Arakida based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Hideho Arakida. Hideho Arakida is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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18 of 18 papers shown

Arakida, Hideho, et al.. (2012). Visconti2 - a heterogeneous multi-core SoC for image-recognition applications. 1–22. 2 indexed citations

Takahashi, Makoto, Hiroyuki Hara, Hideho Arakida, et al.. (2010). A 222mW H.264 Full-HD decoding application processor with x512b stacked DRAM in 40nm. 326–327. 12 indexed citations

Takahashi, Makoto, M. Fukuda, Hiroyuki Hara, et al.. (2010). A 40 nm 222 mW H.264 Full-HD Decoding, 25 Power Domains, 14-Core Application Processor With x512b Stacked DRAM. IEEE Journal of Solid-State Circuits. 46(1). 32–41. 21 indexed citations

Mori, Tatsuya, et al.. (2009). Design and implementation of scalable, transparent threads for multi-core media processor. Design, Automation, and Test in Europe. 1035–1039. 4 indexed citations

Sasaki, Shinya, et al.. (2009). Design and implementation of scalable, transparent threads for multi-core media processor. 1035–1039. 2 indexed citations

Mori, Tatsuya, et al.. (2009). A Power, Performance Scalable Eight-Cores Media Processor for Mobile Multimedia Applications. IEEE Journal of Solid-State Circuits. 44(11). 2957–2965. 17 indexed citations

Terazawa, T., et al.. (2008). A power, performance scalable eight-cores media processor for mobile multimedia applications. 13–16. 2 indexed citations

Leverich, Jacob, Hideho Arakida, Alex Solomatnikov, et al.. (2008). Comparative evaluation of memory models for chip multiprocessors. ACM Transactions on Architecture and Code Optimization. 5(3). 1–30. 6 indexed citations

Leverich, Jacob, Hideho Arakida, Alex Solomatnikov, et al.. (2007). Comparing memory systems for chip multiprocessors. ACM SIGARCH Computer Architecture News. 35(2). 358–368. 19 indexed citations

10.

Leverich, Jacob, Hideho Arakida, Alex Solomatnikov, et al.. (2007). Comparing memory systems for chip multiprocessors. 358–368. 73 indexed citations

11.

Arakida, Hideho, Masafumi Takahashi, Yoshiyuki Tsuboi, et al.. (2003). A 160 mW, 80 nA standby, MPEG-4 audiovisual LSI with 16 Mb embedded DRAM and a 5 GOPS adaptive post filter. 1. 42–476. 32 indexed citations

12.

Takahashi, Masafumi, M. Hamada, Hideho Arakida, et al.. (2002). A 60 mW MPEG4 video codec using clustered voltage scaling with variable supply-voltage scheme. 36–37. 8 indexed citations

13.

Nishikawa, Takafumi, Masafumi Takahashi, M. Hamada, et al.. (2002). A 60 MHz 240 mW MPEG-4 video-phone LSI with 16 Mb embedded DRAM. 230–231,. 25 indexed citations

14.

Hamada, M., Masafumi Takahashi, Hideho Arakida, et al.. (2002). A top-down low power design technique using clustered voltage scaling with variable supply-voltage scheme. 495–498. 67 indexed citations

15.

Takahashi, Masafumi, Takafumi Nishikawa, Hideho Arakida, et al.. (2002). A scalable MPEG-4 video codec architecture for IMT-2000 multimedia applications. 2. 188–191. 6 indexed citations

16.

Takahashi, Masafumi, M. Hamada, T. Takayanagi, et al.. (2000). A 60-MHz 240-mW MPEG-4 videophone LSI with 16-Mb embedded DRAM. IEEE Journal of Solid-State Circuits. 35(11). 1713–1721. 68 indexed citations

17.

Usami, Kimiyoshi, M. Igarashi, Takashi Ishikawa, et al.. (1998). Design methodology of ultra low-power MPEG4 codec core exploiting voltage scaling techniques. 483–488. 39 indexed citations

18.

Takahashi, Masafumi, M. Hamada, Takafumi Nishikawa, et al.. (1998). A 60-mW MPEG4 video codec using clustered voltage scaling with variable supply-voltage scheme. IEEE Journal of Solid-State Circuits. 33(11). 1772–1780. 82 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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