Jinian Bian

545 total citations
76 papers, 369 citations indexed

About

Jinian Bian is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Computer Networks and Communications. According to data from OpenAlex, Jinian Bian has authored 76 papers receiving a total of 369 indexed citations (citations by other indexed papers that have themselves been cited), including 57 papers in Hardware and Architecture, 50 papers in Electrical and Electronic Engineering and 17 papers in Computer Networks and Communications. Recurrent topics in Jinian Bian's work include VLSI and FPGA Design Techniques (37 papers), Embedded Systems Design Techniques (37 papers) and VLSI and Analog Circuit Testing (25 papers). Jinian Bian is often cited by papers focused on VLSI and FPGA Design Techniques (37 papers), Embedded Systems Design Techniques (37 papers) and VLSI and Analog Circuit Testing (25 papers). Jinian Bian collaborates with scholars based in China, United States and Japan. Jinian Bian's co-authors include Qiang Zhou, Chung‐Kuan Cheng, Sheqin Dong, Hannah Honghua Yang, V. Pitchumani, Xianlong Hong, Zhuoyuan Li, Wooyoung Jang, David Z. Pan and Shan Zeng and has published in prestigious journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Computers in Industry and Advanced Engineering Informatics.

In The Last Decade

Jinian Bian

61 papers receiving 357 citations

Peers

Countries citing papers authored by Jinian Bian

Since Specialization

Citations

This map shows the geographic impact of Jinian Bian's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Jinian Bian with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Jinian Bian more than expected).

Fields of papers citing papers by Jinian Bian

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Jinian Bian. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Jinian Bian. The network helps show where Jinian Bian may publish in the future.

Co-authorship network of co-authors of Jinian Bian

This figure shows the co-authorship network connecting the top 25 collaborators of Jinian Bian. A scholar is included among the top collaborators of Jinian Bian based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Jinian Bian. Jinian Bian is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	RALP: Reconvergence-aware layer partitioning for 3D FPGAs 2013 ·(unknown), Yuchun Ma, Yu Wang, Wayne Luk, Jinian Bian	1
2	Efficient custom instruction generation based on characterizing of basic blocks 2013 ·(unknown), Yuchun Ma, Kang Zhao, Jinian Bian	0
3	Pruning-Based Trace Signal Selection Algorithm for Data Acquisition in Post-Silicon Validation 2012 ·IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences ·Kang Zhao, Jinian Bian	2
4	Pruning-based trace signal selection algorithm 2011 ·Asia and South Pacific Design Automation Conference ·Kang Zhao, Jinian Bian	0
5	Behavioral level dual-v th design for reduced leakage power with thermal awareness 2010 ·Design, Automation, and Test in Europe ·(unknown), Qiang Zhou, Gang Qu, Jinian Bian	4
6	Multilevel optimization for large-scale hierarchical FPGA placement 2010 ·Hui Dai, Qiang Zhou, Jinian Bian	2
7	An assertion-based verification method for SystemC TLM 2010 ·(unknown), Jinian Bian, (unknown)	2
8	Mutation-based diagnostic test generation for hardware design error diagnosis 2010 ·Rare & Special e-Zone (The Hong Kong University of Science and Technology) ·(unknown), Kwang‐Ting Cheng, Jinian Bian, (unknown)	2
9	Self-adjusting constrained random stimulus generation using splitting evenness evaluation and XOR constraints 2009 ·Asia and South Pacific Design Automation Conference ·(unknown), (unknown), Jinian Bian, (unknown)	7
10	Self-adjusting constrained random stimulus generation using splitting evenness evaluation and XOR constraints 2009 ·Shujun Deng, (unknown), Jinian Bian, (unknown)	6
11	A novel fixed-outline floorplanner with zero deadspace for hierarchical design 2008 ·International Conference on Computer Aided Design ·(unknown), Sheqin Dong, Jinian Bian, Satoshi Goto, Chung‐Kuan Cheng	17
12	Low power clock buffer planning methodology in F-D placement for large scale circuit design 2008 ·Yanfeng Wang, Qiang Zhou, Yici Cai, Jiang Hu, Xianlong Hong, Jinian Bian	1
13	MacroMap: A technology mapping algorithm for heterogeneous FPGAs with effective area estimation 2008 ·(unknown), Juanjuan Chen, Qiang Zhou, Yici Cai, Jinian Bian, (unknown)	2
14	Fast Wirelength-driven Partition-based Placement for Island Style FPGAs 2008 ·(unknown), Sheqin Dong, Jinian Bian, Xianlong Hong	0
15	VPH: Versatile Routability-Driven Place Algorithm for Hierarchical FPGAs Based on VPR 2007 ·Yanhua Wang, Qiang Zhou, Jinian Bian, (unknown)	2
16	Efficient Thermal via Planning Approach and Its Application in 3-D Floorplanning 2007 ·IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Zhuoyuan Li, Xianlong Hong, Qiang Zhou, Shan Zeng, Jinian Bian, Wenjian Yu, Hannah Honghua Yang, V. Pitchumani, Chung‐Kuan Cheng	24
17	Verilog Transformation for an RTL SAT Solver in Formal Verification 2007 ·(unknown), Jinian Bian, (unknown), (unknown)	1
18	RTSAT: A Hybrid Satisfiability Solver for RTL Circuits 2006 ·(unknown), (unknown), Jinian Bian	1
19	A Heterogeneous Dependency Graph as Intermediate Representation for Instruction Set Customization 2006 ·Advances in intelligent systems research ·Kang Zhao, Jinian Bian, Sheqin Dong	1
20	HSM2: A new heuristic state minimization algorithm for finite state machine 2004 ·Journal of Computer Science and Technology ·(unknown), (unknown), Jinian Bian	1

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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