Jafar Savoj

889 total citations
27 papers, 684 citations indexed

About

Jafar Savoj is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Biomedical Engineering. According to data from OpenAlex, Jafar Savoj has authored 27 papers receiving a total of 684 indexed citations (citations by other indexed papers that have themselves been cited), including 26 papers in Electrical and Electronic Engineering, 6 papers in Hardware and Architecture and 6 papers in Biomedical Engineering. Recurrent topics in Jafar Savoj's work include Advancements in PLL and VCO Technologies (22 papers), Radio Frequency Integrated Circuit Design (12 papers) and Semiconductor Lasers and Optical Devices (8 papers). Jafar Savoj is often cited by papers focused on Advancements in PLL and VCO Technologies (22 papers), Radio Frequency Integrated Circuit Design (12 papers) and Semiconductor Lasers and Optical Devices (8 papers). Jafar Savoj collaborates with scholars based in United States and Israel. Jafar Savoj's co-authors include Behzad Razavi, Amir Amirkhany, Aliazam Abbasfar, B.W. Garlepp, Ken Chang, Parag Upadhyaya, Mark Horowitz, Stanley Chen, Jay Im and Daniel Wu and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, Kluwer Academic Publishers eBooks and Design, Automation, and Test in Europe.

In The Last Decade

Jafar Savoj

25 papers receiving 646 citations

Peers

Countries citing papers authored by Jafar Savoj

Since Specialization

Citations

This map shows the geographic impact of Jafar Savoj's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Jafar Savoj with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Jafar Savoj more than expected).

Fields of papers citing papers by Jafar Savoj

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Jafar Savoj. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Jafar Savoj. The network helps show where Jafar Savoj may publish in the future.

Co-authorship network of co-authors of Jafar Savoj

This figure shows the co-authorship network connecting the top 25 collaborators of Jafar Savoj. A scholar is included among the top collaborators of Jafar Savoj based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Jafar Savoj. Jafar Savoj is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	A 0.5–16.3 Gb/s Fully Adaptive Flexible-Reach Transceiver for FPGA in 20 nm CMOS 2015 ·IEEE Journal of Solid-State Circuits ·Yohan Frans, Declan Carey, (unknown), (unknown), (unknown), (unknown), (unknown), (unknown), Jay Im, Parag Upadhyaya, (unknown), (unknown), Jafar Savoj, Ken Chang	20
2	3.3 A 0.5-to-32.75Gb/s flexible-reach wireline transceiver in 20nm CMOS 2015 ·Parag Upadhyaya, Jafar Savoj, Fu-Tai An, (unknown), (unknown), (unknown), Daniel Wu, (unknown), (unknown), Hiva Hedayati, Jay Im, (unknown), Stanley Chen, Toan Thang Pham, Yohan Frans, Ken Chang	34
3	Device aware high-speed transceiver design in planar and FinFet technologies 2014 ·Ken Chang, Jafar Savoj, Parag Upadhyaya, Yohan Frans	1
4	Wideband flexible-reach techniques for a 0.5–16.3Gb/s fully-adaptive transceiver in 20nm CMOS 2014 ·Jafar Savoj, (unknown), Declan Carey, (unknown), (unknown), Yohan Frans, (unknown), Jay Im, (unknown), (unknown), Parag Upadhyaya, Daniel Wu, Ken Chang	7
5	Design of high-speed wireline transceivers for backplane communications in 28nm CMOS 2012 ·Jafar Savoj, (unknown), Parag Upadhyaya, Fu-Tai An, Jay Im, (unknown), (unknown), (unknown), Daniel Wu, Elad Alon, Ken Chang	21
6	A low-power 6.6-Gb/s wireline transceiver for low-cost FPGAs in 28nm CMOS 2012 ·Jafar Savoj, (unknown), Fu-Tai An, Michael Buckley, Jay Im, (unknown), (unknown), (unknown), (unknown), (unknown), (unknown), Daniel Wu, Ken Chang	0
7	A wide common-mode fully-adaptive multi-standard 12.5Gb/s backplane transceiver in 28nm CMOS 2012 ·Jafar Savoj, (unknown), Parag Upadhyaya, Fu-Tai An, (unknown), Stanley Chen, (unknown), (unknown), (unknown), (unknown), (unknown), (unknown), Daniel Wu, (unknown), Elad Alon, Ken Chang	22
8	Technologies that could change the world — You decide! 2012 ·Jed Hurwitz, Jafar Savoj	2
9	A 24 Gb/s Software Programmable Analog Multi-Tone Transmitter 2008 ·IEEE Journal of Solid-State Circuits ·Amir Amirkhany, Aliazam Abbasfar, Jafar Savoj, (unknown), B.W. Garlepp, Ravi Kollipara, Vladimir Stojanović, Mark Horowitz	27
10	A new technique for characterization of digital-to-analog converters in high-speed systems 2007 ·Design, Automation, and Test in Europe ·Jafar Savoj, Aliazam Abbasfar, Amir Amirkhany, B.W. Garlepp, Mark Horowitz	15
11	Time-Variant Characterization and Compensation of Wideband Circuits 2007 ·Amir Amirkhany, Aliazam Abbasfar, Jafar Savoj, Mark Horowitz	4
12	A 24Gb/s Software Programmable Multi-Channel Transmitter 2007 ·Amir Amirkhany, Aliazam Abbasfar, Jafar Savoj, (unknown), B.W. Garlepp, Vladimir Stojanović, Mark Horowitz	13
13	A New Technique for Characterization of Digital-to-Analog Converters in High-Speed Systems 2007 ·Jafar Savoj, Aliazam Abbasfar, Amir Amirkhany, B.W. Garlepp, Mark Horowitz	19
14	A 3.125-Gb/s Sub-Milliwatt CMOS Signal Detector Circuit 2005 ·Jafar Savoj, (unknown)	0
15	A 10-Gb/s CMOS clock and data recovery circuit with a half-rate binary phase/frequency detector 2003 ·IEEE Journal of Solid-State Circuits ·Jafar Savoj, Behzad Razavi	126
16	A low–power 20–Gb/s CMOS 2:1 multiplexer/driver 2002 ·European Solid-State Circuits Conference ·(unknown), Jafar Savoj	1
17	High-speed CMOS Circuits for Optical Receivers 2002 ·Kluwer Academic Publishers eBooks ·Jafar Savoj, Behzad Razavi	44
18	A 10-Gb/s CMOS clock and data recovery circuit 2002 ·Jafar Savoj, Behzad Razavi	11
19	A 10-Gb/s CMOS clock and data recovery circuit with a half-rate linear phase detector 2001 ·IEEE Journal of Solid-State Circuits ·Jafar Savoj, Behzad Razavi	191
20	A CMOS interface circuit for detection of 1.2 Gb/s RZ data 1999 ·Jafar Savoj, Behzad Razavi	12

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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