Zeynep Toprak-Deniz

836 total citations
27 papers, 515 citations indexed

About

Zeynep Toprak-Deniz is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Hardware and Architecture. According to data from OpenAlex, Zeynep Toprak-Deniz has authored 27 papers receiving a total of 515 indexed citations (citations by other indexed papers that have themselves been cited), including 25 papers in Electrical and Electronic Engineering, 11 papers in Biomedical Engineering and 7 papers in Hardware and Architecture. Recurrent topics in Zeynep Toprak-Deniz's work include Analog and Mixed-Signal Circuit Design (11 papers), Advancements in PLL and VCO Technologies (10 papers) and Low-power high-performance VLSI design (8 papers). Zeynep Toprak-Deniz is often cited by papers focused on Analog and Mixed-Signal Circuit Design (11 papers), Advancements in PLL and VCO Technologies (10 papers) and Low-power high-performance VLSI design (8 papers). Zeynep Toprak-Deniz collaborates with scholars based in United States, Switzerland and Germany. Zeynep Toprak-Deniz's co-authors include John F. Bulzacchelli, H. Ainspan, Daniel J. Friedman, Timothy O. Dickson, Seongwon Kim, Mounir Meghelli, Michael P. Beakes, Alexander Rylyakov, Jonathan E. Proesel and S.V. Rylov and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, Analog Integrated Circuits and Signal Processing and IEEE Solid-State Circuits Magazine.

In The Last Decade

Zeynep Toprak-Deniz

24 papers receiving 491 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Zeynep Toprak-Deniz United States 11 481 185 100 46 13 27 515
Masaya Kibune Japan 17 763 1.6× 354 1.9× 82 0.8× 49 1.1× 7 0.5× 41 777
Tatsuji Matsuura Japan 12 457 1.0× 348 1.9× 44 0.4× 51 1.1× 15 1.2× 65 491
P.G. Drennan United States 9 409 0.9× 175 0.9× 102 1.0× 20 0.4× 20 1.5× 17 438
S.J. Daubert United States 6 241 0.5× 191 1.0× 99 1.0× 85 1.8× 20 1.5× 12 332
J.-F. Naviner France 11 337 0.7× 118 0.6× 159 1.6× 30 0.7× 8 0.6× 55 377
Yohan Frans United States 21 1.1k 2.3× 298 1.6× 158 1.6× 91 2.0× 14 1.1× 53 1.2k
B.W. Garlepp United States 13 572 1.2× 269 1.5× 87 0.9× 46 1.0× 5 0.4× 22 591
J.T. Stonick United States 11 409 0.9× 192 1.0× 43 0.4× 37 0.8× 9 0.7× 25 431
A. Maheshwari United States 9 481 1.0× 61 0.3× 170 1.7× 62 1.3× 12 0.9× 17 509
T. Gabara United States 10 304 0.6× 105 0.6× 50 0.5× 68 1.5× 11 0.8× 39 323

Countries citing papers authored by Zeynep Toprak-Deniz

Since Specialization
Citations

This map shows the geographic impact of Zeynep Toprak-Deniz's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Zeynep Toprak-Deniz with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Zeynep Toprak-Deniz more than expected).

Fields of papers citing papers by Zeynep Toprak-Deniz

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Zeynep Toprak-Deniz. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Zeynep Toprak-Deniz. The network helps show where Zeynep Toprak-Deniz may publish in the future.

Co-authorship network of co-authors of Zeynep Toprak-Deniz

This figure shows the co-authorship network connecting the top 25 collaborators of Zeynep Toprak-Deniz. A scholar is included among the top collaborators of Zeynep Toprak-Deniz based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Zeynep Toprak-Deniz. Zeynep Toprak-Deniz is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Toprak-Deniz, Zeynep, Timothy O. Dickson, Jonathan E. Proesel, et al.. (2024). A 0.88pJ/bit 112Gb/s PAM4 Transmitter with $1\mathrm{V}_{\text{ppd}}$ Output Swing and 5-Tap Analog FFE in 7nm FinFET CMOS. 1–2. 1 indexed citations
2.
Dickson, Timothy O., Zeynep Toprak-Deniz, John F. Bulzacchelli, et al.. (2024). Digital-to-Analog Converters for 100+ Gb/s Wireline Transmitters: Architectures, Circuits, and Calibration. 1–8.
3.
Toprak-Deniz, Zeynep, Jonathan E. Proesel, John F. Bulzacchelli, et al.. (2020). Errata - Erratum to “A 128-Gb/s 1.3-pJ/b PAM-4 Transmitter With Reconfigurable 3-Tap FFE in 14-nm CMOS”. IEEE Journal of Solid-State Circuits. 55(4). 1124–1124.
4.
Toprak-Deniz, Zeynep. (2020). Women in Circuits [Guest Editorial]. IEEE Solid-State Circuits Magazine. 12(4). 19–19. 1 indexed citations
5.
Toprak-Deniz, Zeynep, Jonathan E. Proesel, John F. Bulzacchelli, et al.. (2019). A 128-Gb/s 1.3-pJ/b PAM-4 Transmitter With Reconfigurable 3-Tap FFE in 14-nm CMOS. IEEE Journal of Solid-State Circuits. 55(1). 19–26. 36 indexed citations
6.
7.
Proesel, Jonathan E., Zeynep Toprak-Deniz, Alessandro Cevrero, et al.. (2017). A 32 Gb/s, 4.7 pJ/bit Optical Link With −11.7 dBm Sensitivity in 14-nm FinFET CMOS. IEEE Journal of Solid-State Circuits. 53(4). 1214–1226. 44 indexed citations
8.
Rylov, S.V., T. Beukema, Zeynep Toprak-Deniz, et al.. (2016). 3.1 A 25Gb/s ADC-based serial line receiver in 32nm CMOS SOI. 56–57. 24 indexed citations
9.
10.
Dickson, Timothy O., Yong Liu, Ankur Agrawal, et al.. (2015). A 1.8-pJ/bit 16×16-Gb/s source synchronous parallel interface in 32nm SOI CMOS with receiver redundancy for link recalibration. 1–4. 1 indexed citations
11.
Toprak-Deniz, Zeynep, et al.. (2015). A 7.5 GS/s flash ADC and a 10.24 GS/s time-interleaved ADC for backplane receivers in 65 nm CMOS. Analog Integrated Circuits and Signal Processing. 85(2). 299–310. 2 indexed citations
12.
Friedrich, Joshua, H. Q. Le, William J. Starke, et al.. (2014). The POWER8<sup>TM</sup> processor: Designed for big data, analytics, and cloud environments. 5. 1–4. 7 indexed citations
13.
Fluhr, Eric, Joshua Friedrich, Daniel Dreps, et al.. (2014). 5.1 POWER8<sup>TM</sup>: A 12-core server-class processor in 22nm SOI with 7.6Tb/s off-chip bandwidth. 96–97. 33 indexed citations
14.
Bulzacchelli, John F., et al.. (2012). Dual-Loop System of Distributed Microregulators With High DC Accuracy, Load Response Time Below 500 ps, and 85-mV Dropout Voltage. IEEE Journal of Solid-State Circuits. 47(4). 863–874. 79 indexed citations
15.
Stellari, Franco, et al.. (2012). Root cause identification of an hard-to-find on-chip power supply coupling fail. 1–7. 1 indexed citations
16.
Toprak-Deniz, Zeynep, et al.. (2011). Dual-loop system of distributed microregulators with high DC accuracy, load response time below 500ps, and 85mV dropout voltage. 274–275. 8 indexed citations
17.
Rylyakov, Alexander, et al.. (2009). A 7.5-GS/s 3.8-ENOB 52-mW flash ADC with clock duty cycle control in 65nm CMOS. 268–269. 30 indexed citations
18.
Rylyakov, Alexander, J. Tierno, H. Ainspan, et al.. (2009). Bang-bang digital PLLs at 11 and 20GHz with sub-200fs integrated jitter for high-speed serial communication applications. 94–95,95a. 51 indexed citations
19.
Bulzacchelli, John F., Timothy O. Dickson, Zeynep Toprak-Deniz, et al.. (2009). A 78mW 11.1Gb/s 5-tap DFE receiver with digitally calibrated current-integrating summers in 65nm CMOS. 368–369,369a. 30 indexed citations
20.
Toprak-Deniz, Zeynep, Yusuf Leblebici, & Eric A. Vittoz. (2007). On-Line Global Energy Optimization in Multi-Core Systems Using Principles of Analog Computation. IEEE Journal of Solid-State Circuits. 42(7). 1593–1606. 5 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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