Parag Upadhyaya

1.2k total citations
58 papers, 925 citations indexed

About

Parag Upadhyaya is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Hardware and Architecture. According to data from OpenAlex, Parag Upadhyaya has authored 58 papers receiving a total of 925 indexed citations (citations by other indexed papers that have themselves been cited), including 58 papers in Electrical and Electronic Engineering, 10 papers in Biomedical Engineering and 9 papers in Hardware and Architecture. Recurrent topics in Parag Upadhyaya's work include Radio Frequency Integrated Circuit Design (47 papers), Advancements in PLL and VCO Technologies (36 papers) and Microwave Engineering and Waveguides (13 papers). Parag Upadhyaya is often cited by papers focused on Radio Frequency Integrated Circuit Design (47 papers), Advancements in PLL and VCO Technologies (36 papers) and Microwave Engineering and Waveguides (13 papers). Parag Upadhyaya collaborates with scholars based in United States, Taiwan and South Korea. Parag Upadhyaya's co-authors include Ken Chang, Yohan Frans, Deukhyoun Heo, Jay Im, Toan Thang Pham, Hongtao Zhang, Geoff G. Z. Zhang, Hiva Hedayati, Lei Zhou and Arianne Roldan and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Microwave Theory and Techniques and Electronics Letters.

In The Last Decade

Parag Upadhyaya

57 papers receiving 898 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Parag Upadhyaya United States 18 911 243 89 42 22 58 925
Oren Eliezer United States 14 1.5k 1.7× 588 2.4× 146 1.6× 41 1.0× 17 0.8× 56 1.5k
Baher Haroun United States 15 628 0.7× 262 1.1× 160 1.8× 87 2.1× 37 1.7× 63 710
Brent Carlton United States 15 636 0.7× 156 0.6× 34 0.4× 37 0.9× 16 0.7× 42 658
Ching‐Yuan Yang Taiwan 13 695 0.8× 348 1.4× 44 0.5× 37 0.9× 18 0.8× 68 711
M. Fukaishi Japan 18 797 0.9× 213 0.9× 64 0.7× 108 2.6× 10 0.5× 53 836
R.A. Hadaway Canada 9 750 0.8× 345 1.4× 113 1.3× 42 1.0× 21 1.0× 17 785
M. Borremans Belgium 12 804 0.9× 416 1.7× 21 0.2× 41 1.0× 11 0.5× 32 820
C. Fernando United States 8 1.3k 1.4× 585 2.4× 101 1.1× 32 0.8× 5 0.2× 13 1.3k
George Chien Taiwan 15 885 1.0× 346 1.4× 23 0.3× 39 0.9× 26 1.2× 28 908
Matthias Bräendli Switzerland 15 728 0.8× 337 1.4× 47 0.5× 34 0.8× 15 0.7× 40 743

Countries citing papers authored by Parag Upadhyaya

Since Specialization
Citations

This map shows the geographic impact of Parag Upadhyaya's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Parag Upadhyaya with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Parag Upadhyaya more than expected).

Fields of papers citing papers by Parag Upadhyaya

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Parag Upadhyaya. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Parag Upadhyaya. The network helps show where Parag Upadhyaya may publish in the future.

Co-authorship network of co-authors of Parag Upadhyaya

This figure shows the co-authorship network connecting the top 25 collaborators of Parag Upadhyaya. A scholar is included among the top collaborators of Parag Upadhyaya based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Parag Upadhyaya. Parag Upadhyaya is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Xie, Chuan, et al.. (2024). A 64 Gb/s NRZ O-Band Ring Modulator with 3.2 THz FSR for DWDM Applications. Tu2D.5–Tu2D.5. 4 indexed citations
2.
Raj, Mayank, Wenfeng Zhang, Ying Cao, et al.. (2023). A O.96pJ/b 7 × 50Gb/s-per-Fiber WDM Receiver with Stacked 7nm CMOS and 45nm Silicon Photonic Dies. 11–13. 13 indexed citations
3.
Zhang, Wenfeng, Junho Cho, Yipeng Wang, et al.. (2022). A 1.24-pJ/b 112-Gb/s (870 Gb/s/Mm) Transceiver for In-Package Links in 7-nm FinFET. IEEE Journal of Solid-State Circuits. 57(4). 1199–1210. 17 indexed citations
4.
Zhang, Wenfeng, Junho Cho, Yipeng Wang, et al.. (2021). A 1.24pJ/b 112Gb/s (870Gbps/mm) Transceiver for In-package Links in 7nm FinFET. 1–2. 5 indexed citations
5.
Upadhyaya, Parag, Bob Verbruggen, Ying Cao, et al.. (2018). A 7.4-to-14GHz PLL with 54fs<inf>rms</inf> jitter in 16nm FinFET for integrated RF-data-converter SoCs. 378–380. 53 indexed citations
6.
Upadhyaya, Parag, Arianne Roldan, Wenfeng Zhang, et al.. (2018). A Fully Adaptive 19–58-Gb/s PAM-4 and 9.5–29-Gb/s NRZ Wireline Transceiver With Configurable ADC in 16-nm FinFET. IEEE Journal of Solid-State Circuits. 54(1). 18–28. 29 indexed citations
7.
Upadhyaya, Parag, et al.. (2017). Design techniques for 32.75Gb/s and 56Gb/s wireline transceivers in 16nm FinFET. 1–4. 3 indexed citations
8.
Im, Jay, Arianne Roldan, Ronan Casey, et al.. (2017). A 40-to-56 Gb/s PAM-4 Receiver With Ten-Tap Direct Decision-Feedback Equalization in 16-nm FinFET. IEEE Journal of Solid-State Circuits. 52(12). 3486–3502. 47 indexed citations
9.
Frans, Yohan, Jaewook Shin, Lei Zhou, et al.. (2017). A 56-Gb/s PAM4 Wireline Transceiver Using a 32-Way Time-Interleaved SAR ADC in 16-nm FinFET. IEEE Journal of Solid-State Circuits. 52(4). 1101–1110. 127 indexed citations
10.
11.
Upadhyaya, Parag, et al.. (2016). Novel MOS varactor device optimization and modeling for high-speed transceiver design in FinFET technology. 28.5.1–28.5.4. 2 indexed citations
12.
Carey, Declan, Ronan Casey, Yohan Frans, et al.. (2016). A 0.5-16.3Gbps multi-standard serial transceiver with 219mW/channel in 16nm FinFET. 297–300. 4 indexed citations
13.
Frans, Yohan, Hiva Hedayati, Winson Lin, et al.. (2016). A 40-to-64 Gb/s NRZ Transmitter With Supply-Regulated Front-End in 16 nm FinFET. IEEE Journal of Solid-State Circuits. 51(12). 3167–3177. 23 indexed citations
14.
Chang, Ken, Jafar Savoj, Parag Upadhyaya, & Yohan Frans. (2014). Device aware high-speed transceiver design in planar and FinFet technologies. 18.1.1–18.1.4. 1 indexed citations
15.
Liu, Peng, et al.. (2013). Design Techniques for Load-Independent Direct Bulk-Coupled Low Power QVCO. IEEE Transactions on Microwave Theory and Techniques. 61(10). 3658–3665. 10 indexed citations
16.
Savoj, Jafar, Parag Upadhyaya, Fu-Tai An, et al.. (2012). Design of high-speed wireline transceivers for backplane communications in 28nm CMOS. 46. 1–4. 21 indexed citations
17.
Liu, Peng, et al.. (2012). Load independent bulk-coupled low power quadrature LC VCO. 40. 1–3. 5 indexed citations
18.
Upadhyaya, Parag, et al.. (2006). High Performance PIN Diode in 0.18-&#x003BC;m SiGe BiCMOS Process for Broadband Monolithic Control Circuits. e82 c. 149–152. 3 indexed citations
19.
20.
Upadhyaya, Parag, et al.. (2004). A new 5-GHz ISM band CMOS doubly balanced sub harmonic mixer for direct conversion receiver. 65–68. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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