N. Lindert

1.7k total citations
16 papers, 823 citations indexed

About

N. Lindert is a scholar working on Electrical and Electronic Engineering, Materials Chemistry and Condensed Matter Physics. According to data from OpenAlex, N. Lindert has authored 16 papers receiving a total of 823 indexed citations (citations by other indexed papers that have themselves been cited), including 16 papers in Electrical and Electronic Engineering, 2 papers in Materials Chemistry and 1 paper in Condensed Matter Physics. Recurrent topics in N. Lindert's work include Semiconductor materials and devices (15 papers), Advancements in Semiconductor Devices and Circuit Design (13 papers) and Low-power high-performance VLSI design (3 papers). N. Lindert is often cited by papers focused on Semiconductor materials and devices (15 papers), Advancements in Semiconductor Devices and Circuit Design (13 papers) and Low-power high-performance VLSI design (3 papers). N. Lindert collaborates with scholars based in United States, Italy and Japan. N. Lindert's co-authors include Jeffrey Bokor, Yang‐Kyu Choi, Tsu‐Jae King, Chenming Hu, Vivek Subramanian, K. Asano, Tsu-Jae King, Chenming Hu, Wen‐Chin Lee and L. Chang and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Electron Device Letters and IEEE Circuits and Devices Magazine.

In The Last Decade

N. Lindert

16 papers receiving 749 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
N. Lindert United States 12 790 111 46 45 45 16 823
O. Rozeau France 19 1.2k 1.5× 196 1.8× 42 0.9× 81 1.8× 36 0.8× 87 1.2k
B. Kleveland United States 11 460 0.6× 52 0.5× 47 1.0× 35 0.8× 22 0.5× 24 480
A. Bryant United States 6 511 0.6× 122 1.1× 46 1.0× 57 1.3× 77 1.7× 8 562
Gareth Roy United Kingdom 15 880 1.1× 93 0.8× 82 1.8× 77 1.7× 20 0.4× 33 911
S. Mudanai United States 16 809 1.0× 78 0.7× 77 1.7× 92 2.0× 51 1.1× 37 835
K. Maeguchi Japan 12 533 0.7× 72 0.6× 62 1.3× 55 1.2× 37 0.8× 60 558
N. Planes France 17 781 1.0× 56 0.5× 51 1.1× 49 1.1× 39 0.9× 56 804
Trong Huynh-Bao Belgium 13 636 0.8× 182 1.6× 46 1.0× 70 1.6× 56 1.2× 23 678
Zlatan Stanojević Austria 13 433 0.5× 70 0.6× 60 1.3× 81 1.8× 48 1.1× 72 473
Guillermo Indalecio Spain 12 539 0.7× 119 1.1× 18 0.4× 34 0.8× 32 0.7× 34 576

Countries citing papers authored by N. Lindert

Since Specialization
Citations

This map shows the geographic impact of N. Lindert's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by N. Lindert with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites N. Lindert more than expected).

Fields of papers citing papers by N. Lindert

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by N. Lindert. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by N. Lindert. The network helps show where N. Lindert may publish in the future.

Co-authorship network of co-authors of N. Lindert

This figure shows the co-authorship network connecting the top 25 collaborators of N. Lindert. A scholar is included among the top collaborators of N. Lindert based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with N. Lindert. N. Lindert is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

16 of 16 papers shown
1.
Hamzaoglu, Fatih, Ümüt Arslan, Nabhendra Bisnik, et al.. (2014). A 1 Gb 2 GHz 128 GB/s Bandwidth Embedded DRAM in 22 nm Tri-Gate CMOS Technology. IEEE Journal of Solid-State Circuits. 50(1). 150–157. 26 indexed citations
2.
Hamzaoglu, Fatih, Ümüt Arslan, Nabhendra Bisnik, et al.. (2014). 13.1 A 1Gb 2GHz embedded DRAM in 22nm tri-gate CMOS technology. 46 indexed citations
3.
4.
Wang, Yuxiao, Ümüt Arslan, Nabhendra Bisnik, et al.. (2013). Retention time optimization for eDRAM in 22nm tri-gate CMOS technology. 9.5.1–9.5.4. 11 indexed citations
5.
Post, I., M.S. Akbar, G. Curello, et al.. (2006). A 65nm CMOS SOC Technology Featuring Strained Silicon Transistors for RF Applications. 1–3. 37 indexed citations
6.
Subramanian, Vivek, J. Kedzierski, N. Lindert, et al.. (2003). A bulk-Si-compatible ultrathin-body SOI technology for sub-100 nm MOSFETs. 28–29. 7 indexed citations
7.
Choi, Yang‐Kyu, K. Asano, N. Lindert, et al.. (2003). Ultra-thin body SOI MOSFET for deep-sub-tenth micron era. 919–921. 49 indexed citations
8.
Chang, Leland, Yang‐Kyu Choi, J. Kedzierski, et al.. (2003). Moore's law lives on [CMOS transistors]. IEEE Circuits and Devices Magazine. 19(1). 35–42. 32 indexed citations
9.
Tang, Samuel, L. Chang, N. Lindert, et al.. (2002). FinFET-a quasi-planar double-gate MOSFET. 118–119,. 85 indexed citations
10.
Lindert, N., Yang‐Kyu Choi, Leland Chang, et al.. (2002). Quasi-planar NMOS FinFETs with sub-100 nm gate lengths. 26–27. 17 indexed citations
11.
Lindert, N., Yang‐Kyu Choi, L. Chang, et al.. (2002). Quasi-planar FinFETs with selectively grown germanium raised source/drain. ii a 6. 111–112. 5 indexed citations
12.
Choi, Yang‐Kyu, N. Lindert, Peiqi Xuan, et al.. (2002). Sub-20 nm CMOS FinFET technologies. 19.1.1–19.1.4. 157 indexed citations
13.
Lindert, N., L. Chang, Yang‐Kyu Choi, et al.. (2001). Sub-60-nm quasi-planar FinFETs fabricated using a simplified process. IEEE Electron Device Letters. 22(10). 487–489. 118 indexed citations
14.
Choi, Yang‐Kyu, K. Asano, N. Lindert, et al.. (2000). Ultrathin-body SOI MOSFET for deep-sub-tenth micron era. IEEE Electron Device Letters. 21(5). 254–255. 173 indexed citations
15.
Lindert, N., T. Sugii, Samuel Tang, & Chenming Hu. (1999). Dynamic threshold pass-transistor logic for improved delay at lower power supply voltages. IEEE Journal of Solid-State Circuits. 34(1). 85–89. 48 indexed citations
16.
Lindert, N., Makoto Yoshida, C. Wann, & Chenming Hu. (1996). Comparison of GIDL in p/sup +/-poly PMOS and n/sup +/-poly PMOS devices. IEEE Electron Device Letters. 17(6). 285–287. 11 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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