C.-L. Wey

481 total citations
38 papers, 350 citations indexed

About

C.-L. Wey is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computational Theory and Mathematics. According to data from OpenAlex, C.-L. Wey has authored 38 papers receiving a total of 350 indexed citations (citations by other indexed papers that have themselves been cited), including 34 papers in Electrical and Electronic Engineering, 24 papers in Hardware and Architecture and 10 papers in Computational Theory and Mathematics. Recurrent topics in C.-L. Wey's work include VLSI and Analog Circuit Testing (23 papers), Low-power high-performance VLSI design (19 papers) and Radiation Effects in Electronics (12 papers). C.-L. Wey is often cited by papers focused on VLSI and Analog Circuit Testing (23 papers), Low-power high-performance VLSI design (19 papers) and Radiation Effects in Electronics (12 papers). C.-L. Wey collaborates with scholars based in United States and Taiwan. C.-L. Wey's co-authors include T.-Y. Chang, Yi Wan, P.D. Fisher, Rui Huang, Ming‐Der Shieh, S. Krishnan, Ting‐Yu Chang and J.–Y. Jou and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, Electronics Letters and IEEE Transactions on Instrumentation and Measurement.

In The Last Decade

C.-L. Wey

36 papers receiving 327 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
C.-L. Wey United States 10 303 244 60 60 43 38 350
M. d'Abreu United States 11 225 0.7× 197 0.8× 31 0.5× 25 0.4× 53 1.2× 33 302
R. Mehra United States 6 329 1.1× 318 1.3× 28 0.5× 41 0.7× 109 2.5× 10 456
Shiyu Su United States 15 372 1.2× 175 0.7× 43 0.7× 157 2.6× 60 1.4× 52 493
P. Six Belgium 8 169 0.6× 239 1.0× 44 0.7× 19 0.3× 75 1.7× 23 303
Kaviraj Chopra United States 17 851 2.8× 556 2.3× 20 0.3× 64 1.1× 59 1.4× 31 899
Seh-Woong Jeong South Korea 12 214 0.7× 280 1.1× 139 2.3× 19 0.3× 104 2.4× 28 394
R. Hegde United States 5 363 1.2× 116 0.5× 26 0.4× 113 1.9× 110 2.6× 12 409
Chandu Visweswariah United States 17 870 2.9× 614 2.5× 52 0.9× 66 1.1× 34 0.8× 47 911
J.L. Burns United States 13 512 1.7× 238 1.0× 35 0.6× 70 1.2× 85 2.0× 28 552
Kerim Kalafala United States 6 824 2.7× 638 2.6× 38 0.6× 57 0.9× 50 1.2× 9 898

Countries citing papers authored by C.-L. Wey

Since Specialization
Citations

This map shows the geographic impact of C.-L. Wey's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by C.-L. Wey with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites C.-L. Wey more than expected).

Fields of papers citing papers by C.-L. Wey

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by C.-L. Wey. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by C.-L. Wey. The network helps show where C.-L. Wey may publish in the future.

Co-authorship network of co-authors of C.-L. Wey

This figure shows the co-authorship network connecting the top 25 collaborators of C.-L. Wey. A scholar is included among the top collaborators of C.-L. Wey based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with C.-L. Wey. C.-L. Wey is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Shieh, Ming‐Der, C.-L. Wey, & P.D. Fisher. (2003). Model of asynchronous finite state machines and their pipelined structures. 659–662. 1 indexed citations
2.
Wey, C.-L., et al.. (2003). OPAM: an efficient output phase assignment for multilevel logic minimization. 270–273. 1 indexed citations
3.
Wey, C.-L., et al.. (2003). An efficient modeling and synthesis procedure of asynchronous sequential logic circuits. 512–515. 2 indexed citations
4.
Wey, C.-L., et al.. (2002). Race-free state assignments using bipartite graphs. 1993 IEEE International Symposium on Circuits and Systems. 2560–2563. 1 indexed citations
5.
Wey, C.-L., et al.. (2002). High-voltage stress test paradigms of analog CMOS ICs for gate-oxide reliability enhancement. 333–338. 10 indexed citations
6.
Wey, C.-L.. (2002). Concurrent error detection in array dividers by alternating input data. 114–117. 4 indexed citations
7.
Wey, C.-L.. (2000). Design of fast high-radix SRT dividers and their VLSI implementation. IEE Proceedings - Computers and Digital Techniques. 147(4). 275–275. 4 indexed citations
8.
Wan, Yi, et al.. (1999). Efficient conversion algorithms for long-word-length binary logarithmic numbers and logic implementation. IEE Proceedings - Computers and Digital Techniques. 146(6). 295–295. 2 indexed citations
9.
Wey, C.-L., et al.. (1997). GRASS: An efficient gate re-assignment algorithm for inverter minimisation in post technology mapping. IEE Proceedings - Computers and Digital Techniques. 144(5). 348–348. 4 indexed citations
10.
Wey, C.-L.. (1995). Design and test generation of C-testable high-speed carry-free dividers. IEE Proceedings - Computers and Digital Techniques. 142(3). 193–193. 3 indexed citations
11.
Wey, C.-L., et al.. (1994). Concurrent-error detection in high-speed carry-free dividers. IEE Proceedings - Computers and Digital Techniques. 141(6). 356–356. 2 indexed citations
12.
Fisher, P.D., et al.. (1994). Efficient modelling and synthesis procedure of asynchronous sequential logic elements. IEE Proceedings - Computers and Digital Techniques. 141(1). 61–61. 1 indexed citations
13.
Wey, C.-L. & S. Krishnan. (1992). Current-mode divide-by-two circuit. Electronics Letters. 28(9). 820–822. 4 indexed citations
14.
Wey, C.-L., et al.. (1992). Built-in self-test (BIST) structures for analog circuit fault diagnosis with current test data. IEEE Transactions on Instrumentation and Measurement. 41(4). 535–539. 35 indexed citations
15.
Wey, C.-L.. (1991). Concurrent error detection in current-mode A/D convertors. Electronics Letters. 27(25). 2370–2372. 5 indexed citations
16.
Wey, C.-L. & T.-Y. Chang. (1990). An efficient output phase assignment for PLA minimization. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 9(1). 1–7. 12 indexed citations
17.
Wey, C.-L. & T.-Y. Chang. (1990). Design and analysis of VLSI-based parallel multipliers. IEE Proceedings E Computers and Digital Techniques. 137(4). 328–328. 16 indexed citations
18.
Wey, C.-L.. (1990). Built-in self-test (BIST) structure for analog circuit fault diagnosis. IEEE Transactions on Instrumentation and Measurement. 39(3). 517–521. 98 indexed citations
19.
Wey, C.-L., et al.. (1989). Test generation of C-testable array dividers. IEE Proceedings E Computers and Digital Techniques. 136(5). 434–434. 4 indexed citations
20.
Wey, C.-L.. (1988). On yield consideration for the design of redundant programmable logic arrays. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 7(4). 528–535. 24 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact

Rankless by CCL
2026