H.-F.S. Law

708 total citations
5 papers, 509 citations indexed

About

H.-F.S. Law is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Networks and Communications. According to data from OpenAlex, H.-F.S. Law has authored 5 papers receiving a total of 509 indexed citations (citations by other indexed papers that have themselves been cited), including 5 papers in Electrical and Electronic Engineering, 2 papers in Hardware and Architecture and 1 paper in Computer Networks and Communications. Recurrent topics in H.-F.S. Law's work include Low-power high-performance VLSI design (5 papers), VLSI and FPGA Design Techniques (4 papers) and VLSI and Analog Circuit Testing (2 papers). H.-F.S. Law is often cited by papers focused on Low-power high-performance VLSI design (5 papers), VLSI and FPGA Design Techniques (4 papers) and VLSI and Analog Circuit Testing (2 papers). H.-F.S. Law collaborates with scholars based in United States. H.-F.S. Law's co-authors include R.H. Krambeck and Sung Mo Kang and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Electron Devices and IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

In The Last Decade

H.-F.S. Law

5 papers receiving 457 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
H.-F.S. Law United States	5	465	209	104	88	45	5	509
J.L. Burns United States	13	512 1.1×	238 1.1×	70 0.7×	35 0.4×	11 0.2×	28	552
R. Burch United States	8	504 1.1×	360 1.7×	40 0.4×	44 0.5×	38 0.8×	20	561
Yibin Ye United States	13	543 1.2×	157 0.8×	102 1.0×	89 1.0×	41 0.9×	30	601
Chandramouli Kashyap United States	17	940 2.0×	626 3.0×	74 0.7×	30 0.3×	23 0.5×	38	982
W. Paul Griffin United States	5	379 0.8×	140 0.7×	111 1.1×	51 0.6×	20 0.4×	6	405
P. Kozak United States	8	477 1.0×	332 1.6×	23 0.2×	32 0.4×	12 0.3×	9	519
M. Elmasry Canada	9	502 1.1×	142 0.7×	146 1.4×	32 0.4×	16 0.4×	28	524
C.-L. Wey United States	10	303 0.7×	244 1.2×	60 0.6×	60 0.7×	7 0.2×	38	350
Koen Lampaert Belgium	11	600 1.3×	423 2.0×	62 0.6×	32 0.4×	29 0.6×	20	625
S.S. Mahant-Shetti United States	8	241 0.5×	98 0.5×	54 0.5×	38 0.4×	54 1.2×	20	330

Countries citing papers authored by H.-F.S. Law

Since Specialization

Citations

This map shows the geographic impact of H.-F.S. Law's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by H.-F.S. Law with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites H.-F.S. Law more than expected).

Fields of papers citing papers by H.-F.S. Law

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by H.-F.S. Law. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by H.-F.S. Law. The network helps show where H.-F.S. Law may publish in the future.

Co-authorship network of co-authors of H.-F.S. Law

This figure shows the co-authorship network connecting the top 25 collaborators of H.-F.S. Law. A scholar is included among the top collaborators of H.-F.S. Law based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with H.-F.S. Law. H.-F.S. Law is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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5 of 5 papers shown

1.

Kang, Sung Mo, et al.. (1983). Gate Matrix Layout of Random Control Logic in a 32-bit CMOS CPU Chip Adaptable to Evolving Logic Design. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2(1). 18–29. 15 indexed citations

2.

Krambeck, R.H., et al.. (1982). High-speed compact circuits with CMOS. IEEE Journal of Solid-State Circuits. 17(3). 614–619. 345 indexed citations

3.

Law, H.-F.S., et al.. (1980). A dense gate matrix layout style for MOS LSI. 212–213. 16 indexed citations

4.

Law, H.-F.S., et al.. (1980). A Dense Gate Matrix Layout Method for MOS VLSI. IEEE Journal of Solid-State Circuits. 15(4). 736–740. 41 indexed citations

5.

Law, H.-F.S., et al.. (1980). A dense gate matrix layout method for MOS VLSI. IEEE Transactions on Electron Devices. 27(8). 1671–1675. 92 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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