P. Six

473 citations

23 papers · 303 indexed · h-index 8

Impact in

Hardware and Architecture top 5%
- Embedded Systems Design Techniques
- Parallel Computing and Optimization Techniques
- VLSI and Analog Circuit Testing
Computer Networks and Communications top 10%
- Interconnection Networks and Systems

Papers in ⓘ

Electrical and Electronic Engineering 17
- VLSI and FPGA Design Techniques 13
- Low-power high-performance VLSI design 6
- Semiconductor materials and devices 3
- Electrostatic Discharge in Electronics 2
Hardware and Architecture 16
- Embedded Systems Design Techniques 11
- VLSI and Analog Circuit Testing 5
- Parallel Computing and Optimization Techniques 4

Co-authors: H. De Man (11 shared papers)Jan M. Rabaey (6 shared papers)Luc Claesen (5 shared papers)H.J. De Man (5 shared papers)Hugo De Man (4 shared papers)Jan Vanhoof (1 shared paper)Joos Vandewalle (1 shared paper)Gert Goossens (2 shared papers)
Journals: IEEE Journal of Solid-State Circuits (3 papers)IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2 papers)Solid-State Electronics (1 paper)IEEE Transactions on Electron Devices (1 paper)Design Automation Conference (1 paper)
Partner nations: Belgium Netherlands United States

In The Last Decade

P. Six

21 papers receiving 278 citations

Peers

Countries citing papers authored by P. Six

Since Specialization

Citations

This map shows the geographic impact of P. Six's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by P. Six with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites P. Six more than expected).

Fields of papers citing papers by P. Six

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by P. Six. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by P. Six. The network helps show where P. Six may publish in the future.

Co-authors

The 20 scholars most cited alongside P. Six, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with P. Six Line = papers co-authored together P. Six links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

Showing the 20 most-cited of 23 papers — load more, or switch the sort, to bring in the rest.

#	Work
1	Cathedral-II: A Silicon Compiler for Digital Signal Processing IEEE Design & Test of Computers ·H. De Man, Jan M. Rabaey, P. Six, Luc Claesen	1986	133
2	CATHEDRAL-II—a computer-aided synthesis system for digital signal processing VLSI systems H. De Man, Jan M. Rabaey, Jan Vanhoof, Gert Goossens, P. Six, Luc Claesen	1988	27
3	Efficient system exploration and synthesis of applications with dynamic data storage and intensive data transfer Julio Leao da Silva, Hugo De Man, Chantal Ykman-Couvreur, Miguel Miranda, Kris Croes, Sven Wuytack, Gjalt de Jong, Francky Catthoor, Diederik Verkest, P. Six	1998	25
4	Estimation of typical power of synchronous CMOS circuits using a hierarchy of simulators IEEE Journal of Solid-State Circuits ·Paul Vanoostende, P. Six, Joos Vandewalle, H.J. De Man	1993	20
5	A data path layout assembler for high performance DSP circuits Hongping Cai, S. Note, P. Six, H. De Man	1990	17
6	Design of a process-tolerant cell library for regular structures using symbolic layout and hierarchical compaction IEEE Journal of Solid-State Circuits ·L. Rijnders, P. Six, H.J. De Man	1988	13
7	CAMELEON: a process-tolerant symbolic layout system IEEE Journal of Solid-State Circuits ·K. Croes, Hugo De Man, P. Six	1988	13
8	An Intelligent Module Generator Environment Design Automation Conference ·P. Six, Luc Claesen, Jan M. Rabaey, H. De Man	1986	9
9	CGE: automatic generation of controllers in the CATHEDRAL-II silicon compiler European Design Automation Conference ·Jeroen Zegers, P. Six, Jan M. Rabaey, H. De Man	1990	6
10	An intelligent module generator environment P. Six, Luc Claesen, Jan M. Rabaey, H. De Man	1986	6
11	An Interactive Environment for Creating Module Generators P. Six, I. Vandeweerd, H. De Man	1986	6
12	Timing optimization by bit-level arithmetic transformations European Design Automation Conference ·L. Rijnders, Zakaria Sahraoui, P. Six, H. De Man	1995	5
13	An Intelligent Module Generator Environment P. Six, Luc Claesen, Jan M. Rabaey, H. De Man	1986	5
14	A VLSI-architecture for parallel non-linear diffusion with applications in vision Toon Gijbels, P. Six, Louis van Gool, Francky Catthoor, H. De Man, A. Oosterlinck	2002	5
15	DARSI: RC data reduction (VLSI simulation) IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Paul Vanoostende, P. Six, H.J. De Man	1991	4
16	Search space reduction through clustering in test generation European Design Automation Conference ·Zakaria Sahraoui, P. Six, I. Bolsens, H. De Man	1995	2
17	Regular Module Generation or Standard Cells: Two Alternative Implementations of a Library of Functional Building Blocks Evagelos Katsadas, Zohair Sahraoui, Maryse Wouters, Veerle Derudder, I. Bolsens, P. Six, Hugo De Man	1992	2
18	PRITI: Estimation of maximal currents and current derivatives in complex CMOS circuits using activities waveforms Paul Vanoostende, P. Six, H.J. De Man	2002	2
19	Design of a Process Tolerant Cell Library for Regular Structures using Symbolic Layout and Hierarchical Compaction L. Rijnders, P. Six, H. De Man	1987	1
20	REDUSA: module generation by automatic elimination of superfluous blocks in regular structures IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·I. Vandeweerd, K. Croes, L. Rijnders, P. Six, H.J. De Man	1989	1

About P. Six

P. Six is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture, Industrial and Manufacturing Engineering, Computational Theory and Mathematics and Control and Systems Engineering, having authored 23 papers that have together received 303 indexed citations. Recurring topics across this work include VLSI and FPGA Design Techniques (13 papers), Embedded Systems Design Techniques (11 papers), Low-power high-performance VLSI design (6 papers), Manufacturing Process and Optimization (5 papers), VLSI and Analog Circuit Testing (5 papers), Parallel Computing and Optimization Techniques (4 papers), Semiconductor materials and devices (3 papers) and Electrostatic Discharge in Electronics (2 papers). The work is most often cited by research in Hardware and Architecture (239 citations), Computer Networks and Communications (75 citations), Electrical and Electronic Engineering (169 citations), Computational Theory and Mathematics (44 citations) and Signal Processing (28 citations). P. Six has collaborated with scholars based in Belgium, Netherlands and United States. Frequent co-authors include H. De Man, Jan M. Rabaey, Luc Claesen, H.J. De Man, Hugo De Man, Jan Vanhoof, Joos Vandewalle, Gert Goossens, S. Note and Hongping Cai. Their work appears in journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Solid-State Electronics, IEEE Transactions on Electron Devices and Design Automation Conference.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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