P. Six

473 total citations
23 papers, 303 citations indexed

About

P. Six is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Industrial and Manufacturing Engineering. According to data from OpenAlex, P. Six has authored 23 papers receiving a total of 303 indexed citations (citations by other indexed papers that have themselves been cited), including 17 papers in Electrical and Electronic Engineering, 16 papers in Hardware and Architecture and 5 papers in Industrial and Manufacturing Engineering. Recurrent topics in P. Six's work include VLSI and FPGA Design Techniques (13 papers), Embedded Systems Design Techniques (11 papers) and Low-power high-performance VLSI design (6 papers). P. Six is often cited by papers focused on VLSI and FPGA Design Techniques (13 papers), Embedded Systems Design Techniques (11 papers) and Low-power high-performance VLSI design (6 papers). P. Six collaborates with scholars based in Belgium, Netherlands and United States. P. Six's co-authors include H. De Man, Jan M. Rabaey, Luc Claesen, H.J. De Man, Hugo De Man, Jan Vanhoof, Joos Vandewalle, Gert Goossens, Hongping Cai and S. Note and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Electron Devices and IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

In The Last Decade

P. Six

21 papers receiving 278 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
P. Six Belgium	8	239	169	75	44	28	23	303
S. Note Belgium	6	241 1.0×	96 0.6×	108 1.4×	41 0.9×	26 0.9×	13	275
Phu Hoang United States	4	320 1.3×	142 0.8×	138 1.8×	47 1.1×	19 0.7×	6	358
M. d'Abreu United States	11	197 0.8×	225 1.3×	53 0.7×	31 0.7×	15 0.5×	33	302
George Economakos Greece	9	216 0.9×	141 0.8×	97 1.3×	40 0.9×	11 0.4×	73	289
Werner Geurts Belgium	9	227 0.9×	90 0.5×	114 1.5×	18 0.4×	18 0.6×	18	263
C.-L. Wey United States	10	244 1.0×	303 1.8×	43 0.6×	60 1.4×	18 0.6×	38	350
Marcin Kubica Poland	11	184 0.8×	152 0.9×	34 0.5×	79 1.8×	18 0.6×	34	297
Kiran Bondalapati United States	6	151 0.6×	73 0.4×	111 1.5×	23 0.5×	9 0.3×	8	214
A. Kalavade United States	6	369 1.5×	103 0.6×	207 2.8×	35 0.8×	12 0.4×	9	409
P.I. Rubinfeld United States	7	258 1.1×	131 0.8×	213 2.8×	17 0.4×	10 0.4×	9	320

Countries citing papers authored by P. Six

Since Specialization

Citations

This map shows the geographic impact of P. Six's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by P. Six with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites P. Six more than expected).

Fields of papers citing papers by P. Six

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by P. Six. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by P. Six. The network helps show where P. Six may publish in the future.

Co-authorship network of co-authors of P. Six

This figure shows the co-authorship network connecting the top 25 collaborators of P. Six. A scholar is included among the top collaborators of P. Six based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with P. Six. P. Six is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

Six, P., et al.. (2002). A VLSI-architecture for parallel non-linear diffusion with applications in vision. 398–407. 5 indexed citations

Man, Hugo De, Sven Wuytack, Gjalt de Jong, et al.. (1998). Efficient system exploration and synthesis of applications with dynamic data storage and intensive data transfer. 76–81. 25 indexed citations

Six, P., et al.. (1995). Timing optimization by bit-level arithmetic transformations. European Design Automation Conference. 48–53. 5 indexed citations

Six, P., et al.. (1995). Search space reduction through clustering in test generation. European Design Automation Conference. 242–247. 2 indexed citations

Six, P., et al.. (1993). Estimation of typical power of synchronous CMOS circuits using a hierarchy of simulators. IEEE Journal of Solid-State Circuits. 28(1). 26–39. 20 indexed citations

Derudder, Veerle, et al.. (1992). Regular Module Generation or Standard Cells: Two Alternative Implementations of a Library of Functional Building Blocks. 22. 167–181. 2 indexed citations

Six, P., et al.. (1991). DARSI: RC data reduction (VLSI simulation). IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 10(4). 493–500. 4 indexed citations

Six, P., et al.. (1990). CGE: automatic generation of controllers in the CATHEDRAL-II silicon compiler. European Design Automation Conference. 617–621. 6 indexed citations

Cai, Hongping, S. Note, P. Six, & H. De Man. (1990). A data path layout assembler for high performance DSP circuits. 306–311. 17 indexed citations

10.

Six, P., et al.. (1989). REDUSA: module generation by automatic elimination of superfluous blocks in regular structures. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 8(9). 989–998. 1 indexed citations

11.

Six, P., et al.. (1988). Design of a process-tolerant cell library for regular structures using symbolic layout and hierarchical compaction. IEEE Journal of Solid-State Circuits. 23(3). 714–721. 13 indexed citations

12.

Rabaey, Jan M., et al.. (1988). CATHEDRAL-II—a computer-aided synthesis system for digital signal processing VLSI systems. 5(2). 55–55. 27 indexed citations

13.

Man, Hugo De, et al.. (1988). CAMELEON: a process-tolerant symbolic layout system. IEEE Journal of Solid-State Circuits. 23(3). 705–713. 13 indexed citations

14.

Six, P., et al.. (1987). Design of a Process Tolerant Cell Library for Regular Structures using Symbolic Layout and Hierarchical Compaction. 197–200. 1 indexed citations

15.

Six, P., Luc Claesen, Jan M. Rabaey, & H. De Man. (1986). An Intelligent Module Generator Environment. Design Automation Conference. 730–735. 9 indexed citations

16.

Man, H. De, Jan M. Rabaey, P. Six, & Luc Claesen. (1986). Cathedral-II: A Silicon Compiler for Digital Signal Processing. IEEE Design & Test of Computers. 3(6). 13–25. 133 indexed citations

17.

Six, P., Luc Claesen, Jan M. Rabaey, & H. De Man. (1986). An Intelligent Module Generator Environment. 730–735. 5 indexed citations

18.

Six, P., Luc Claesen, Jan M. Rabaey, & H. De Man. (1986). An intelligent module generator environment. 730–735. 6 indexed citations

19.

Maes, H.E., P. Six, & Willy Sansen. (1981). A model for the breakdown characteristics of p-channel MOS transistor protection devices. Solid-State Electronics. 24(6). 523–531.

20.

Maes, H.E., P. Six, & Willy Sansen. (1981). The implanted zener diode (IZD) as an input protection device for MOS integrated circuits. IEEE Transactions on Electron Devices. 28(9). 1071–1077.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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