Chrong Jung Lin

1.4k total citations
106 papers, 1.1k citations indexed

About

Chrong Jung Lin is a scholar working on Electrical and Electronic Engineering, Computer Networks and Communications and Cellular and Molecular Neuroscience. According to data from OpenAlex, Chrong Jung Lin has authored 106 papers receiving a total of 1.1k indexed citations (citations by other indexed papers that have themselves been cited), including 104 papers in Electrical and Electronic Engineering, 7 papers in Computer Networks and Communications and 6 papers in Cellular and Molecular Neuroscience. Recurrent topics in Chrong Jung Lin's work include Semiconductor materials and devices (78 papers), Advanced Memory and Neural Computing (54 papers) and Ferroelectric and Negative Capacitance Devices (44 papers). Chrong Jung Lin is often cited by papers focused on Semiconductor materials and devices (78 papers), Advanced Memory and Neural Computing (54 papers) and Ferroelectric and Negative Capacitance Devices (44 papers). Chrong Jung Lin collaborates with scholars based in Taiwan, United States and China. Chrong Jung Lin's co-authors include Ya‐Chin King, Y.D. Chih, Meng‐Fan Chang, L. C. Tran, Y.J. Wang, Sangmo Kang, Xiaochun Zhu, Nick Yu, Shyh-Shyuan Sheu and Ming‐Jinn Tsai and has published in prestigious journals such as Journal of Applied Physics, Advanced Functional Materials and Small.

In The Last Decade

Chrong Jung Lin

96 papers receiving 1.1k citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
Chrong Jung Lin Taiwan	17	1.0k	183	99	94	88	106	1.1k
Stefan Cosemans Belgium	20	1.1k 1.1×	102 0.6×	94 0.9×	108 1.1×	85 1.0×	83	1.1k
Yoon-Jong Song South Korea	9	499 0.5×	113 0.6×	180 1.8×	56 0.6×	45 0.5×	13	588
Tzu-Kun Ku Taiwan	15	698 0.7×	60 0.3×	81 0.8×	101 1.1×	69 0.8×	59	761
Takeshi Takagi Japan	10	648 0.6×	87 0.5×	126 1.3×	50 0.5×	124 1.4×	39	724
R. Rodrı́guez Spain	24	2.1k 2.1×	91 0.5×	150 1.5×	132 1.4×	169 1.9×	165	2.1k
Lang Zeng China	20	1.2k 1.2×	266 1.5×	279 2.8×	60 0.6×	161 1.8×	102	1.4k
Xiaoyong Xue China	15	587 0.6×	51 0.3×	154 1.6×	123 1.3×	100 1.1×	86	716
Soonwan Kwon South Korea	7	495 0.5×	97 0.5×	63 0.6×	60 0.6×	57 0.6×	12	570
G.H. Koh South Korea	13	871 0.9×	258 1.4×	363 3.7×	65 0.7×	48 0.5×	35	1.0k
P. Mazoyer France	17	977 1.0×	458 2.5×	219 2.2×	73 0.8×	26 0.3×	42	1.2k

Countries citing papers authored by Chrong Jung Lin

Since Specialization

Citations

This map shows the geographic impact of Chrong Jung Lin's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Chrong Jung Lin with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Chrong Jung Lin more than expected).

Fields of papers citing papers by Chrong Jung Lin

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Chrong Jung Lin. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Chrong Jung Lin. The network helps show where Chrong Jung Lin may publish in the future.

Co-authorship network of co-authors of Chrong Jung Lin

This figure shows the co-authorship network connecting the top 25 collaborators of Chrong Jung Lin. A scholar is included among the top collaborators of Chrong Jung Lin based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Chrong Jung Lin. Chrong Jung Lin is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

Wang, Liyu, Perng-Fei Yuh, Yuxiao Wang, et al.. (2024). A New Ultra-Low Voltage Metal Fuse for High Density OTP Applications. 1–2.

Wang, Yuxiao, et al.. (2024). A New High Density 3D Stackable Via RRAM for Computing-in-Memory SOC Applications. IEEE Transactions on Electron Devices. 71(4). 2399–2403. 1 indexed citations

Lin, Burn J., et al.. (2024). On-Wafer FinFET-Based 3-D E-Beam Detector Cube for In Situ Monitoring of Advanced Lithography Processes Beyond 5 nm. IEEE Transactions on Electron Devices. 71(6). 3739–3745.

Lin, Burn J., et al.. (2023). 4K Detectors Array for On-Wafer EUV Imaging in Lithography Control Beyond 5-nm Node. IEEE Transactions on Electron Devices. 70(11). 5713–5719.

Lin, Burn J., et al.. (2022). A New Self-Powered Wireless Sensing Circuitry for On-Wafer In-Situ EUV Detection. 2022 International Electron Devices Meeting (IEDM). 31.5.1–31.5.4.

Shih, Jiaw‐Ren, Chrong Jung Lin, Ling Lee, et al.. (2021). Complementary Metal–Oxide–Semiconductor Compatible 2D Layered Film‐Based Gas Sensors by Floating‐Gate Coupling Effect. Advanced Functional Materials. 32(13). 16 indexed citations

Wang, Yi‐Chung, Shu‐Chi Wu, Tzu‐Yi Yang, et al.. (2021). Multifunctional Ion‐Sensitive Floating Gate Fin Field‐Effect Transistor with Three‐Dimensional Nanoseaweed Structure by Glancing Angle Deposition Technology. Small. 18(5). e2104168–e2104168. 5 indexed citations

Lin, Burn J., et al.. (2021). On-Wafer Electron Beam Detectors by Floating-Gate FinFET Technologies. IEEE Transactions on Electron Devices. 68(9). 4651–4655.

Lin, Chrong Jung, et al.. (2020). Self-Clamping Programming in Narrow-Bridge Floating Gate Cells for Multi-Level Logic Non-Volatile Memory Applications. IEEE Journal of the Electron Devices Society. 8. 681–685.

10.

Lin, Yu-De, S. S. Sheu, Tuo‐Hung Hou, et al.. (2019). 3D Scalable, Wake-up Free, and Highly Reliable FRAM Technology with Stress-Engineered HfZrO x. IEEE Conference Proceedings. 2019. 1–15. 1 indexed citations

11.

Chang, Jonathan, et al.. (2018). FinFET CMOS logic gates with non-volatile states for reconfigurable computing systems. Integration. 65. 97–103. 2 indexed citations

12.

Chang, Jonathan, et al.. (2017). Twin mode NV logic gates for high speed computing system on 16nm FINFET CMOS logic process. 12.1.1–12.1.4. 1 indexed citations

13.

Lin, Chrong Jung, et al.. (2017). Charge Splitting In Situ Recorder (CSIR) for Real-Time Examination of Plasma Charging Effect in FinFET BEOL Processes. Nanoscale Research Letters. 12(1). 534–534. 22 indexed citations

14.

Shih, Yang‐Hsin, et al.. (2017). Twin-bit Via RRAM in 16nm FinFET Logic Technologies. 1 indexed citations

15.

Lin, Chrong Jung, et al.. (2016). 1-kb FinFET Dielectric Resistive Random Access Memory Array in $1\times $ nm CMOS Logic Technology for Embedded Nonvolatile Memory Applications. IEEE Transactions on Electron Devices. 63(11). 4273–4278. 4 indexed citations

16.

King, Ya‐Chin, et al.. (2016). A high density FinFET one-time programmable cell with new intra-fin cell isolation for advanced system on chip applications. Japanese Journal of Applied Physics. 55(4S). 04EE06–04EE06. 1 indexed citations

17.

Chen, Hung‐Yu, et al.. (2016). Investigation of Set/Reset Operations in CMOS-Logic-Compatible Contact Backfilled RRAMs. IEEE Transactions on Device and Materials Reliability. 16(3). 370–375. 6 indexed citations

18.

Lin, Chrong Jung, et al.. (2014). Point twin-bit RRAM in 3D interweaved cross-point array by Cu BEOL process. 6.4.1–6.4.4. 20 indexed citations

19.

Chih, Y.D., et al.. (2012). High-K metal gate contact RRAM (CRRAM) in pure 28nm CMOS logic process. 31.6.1–31.6.4. 37 indexed citations

20.

Chih, Y.D., et al.. (2011). A High-Density MTP Cell With Contact Coupling Gates by Pure CMOS Logic Process. IEEE Electron Device Letters. 32(10). 1352–1354. 5 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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