Anirudh Devgan

2.1k total citations
42 papers, 1.6k citations indexed

About

Anirudh Devgan is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Control and Systems Engineering. According to data from OpenAlex, Anirudh Devgan has authored 42 papers receiving a total of 1.6k indexed citations (citations by other indexed papers that have themselves been cited), including 38 papers in Electrical and Electronic Engineering, 15 papers in Hardware and Architecture and 2 papers in Control and Systems Engineering. Recurrent topics in Anirudh Devgan's work include Low-power high-performance VLSI design (32 papers), VLSI and FPGA Design Techniques (18 papers) and Semiconductor materials and devices (11 papers). Anirudh Devgan is often cited by papers focused on Low-power high-performance VLSI design (32 papers), VLSI and FPGA Design Techniques (18 papers) and Semiconductor materials and devices (11 papers). Anirudh Devgan collaborates with scholars based in United States, Switzerland and Canada. Anirudh Devgan's co-authors include Charles J. Alpert, Chandramouli Kashyap, Stephen T. Quay, Frank Liu, Wayne Dai, Hao Ji, Erdem Acar, Haihua Su, Sani Nassif and Michael Orshansky and has published in prestigious journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Journal of Low Power Electronics and International Conference on Computer Aided Design.

In The Last Decade

Anirudh Devgan

41 papers receiving 1.5k citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Anirudh Devgan United States 18 1.5k 811 189 92 46 42 1.6k
Vladimir Zolotov United States 23 2.0k 1.3× 1.4k 1.7× 89 0.5× 136 1.5× 56 1.2× 74 2.1k
C. Visweswariah United States 16 1.5k 1.0× 953 1.2× 58 0.3× 124 1.3× 99 2.2× 28 1.6k
Rajendran Panda United States 16 1.0k 0.7× 469 0.6× 59 0.3× 53 0.6× 50 1.1× 40 1.1k
S.G. Walker United States 7 792 0.5× 535 0.7× 40 0.2× 60 0.7× 43 0.9× 9 853
T.M. Souders United States 17 640 0.4× 305 0.4× 158 0.8× 185 2.0× 20 0.4× 45 804
Gerard N. Stenbakken United States 17 739 0.5× 248 0.3× 126 0.7× 130 1.4× 17 0.4× 50 894
Haifeng Qian United States 13 541 0.4× 210 0.3× 70 0.4× 19 0.2× 95 2.1× 43 684
Yiyu Shi United States 15 588 0.4× 211 0.3× 76 0.4× 29 0.3× 51 1.1× 68 689
V. Visvanathan India 14 666 0.4× 471 0.6× 53 0.3× 142 1.5× 74 1.6× 56 784
Sudeep Ghosh United States 5 659 0.4× 468 0.6× 310 1.6× 10 0.1× 18 0.4× 14 893

Countries citing papers authored by Anirudh Devgan

Since Specialization
Citations

This map shows the geographic impact of Anirudh Devgan's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Anirudh Devgan with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Anirudh Devgan more than expected).

Fields of papers citing papers by Anirudh Devgan

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Anirudh Devgan. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Anirudh Devgan. The network helps show where Anirudh Devgan may publish in the future.

Co-authorship network of co-authors of Anirudh Devgan

This figure shows the co-authorship network connecting the top 25 collaborators of Anirudh Devgan. A scholar is included among the top collaborators of Anirudh Devgan based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Anirudh Devgan. Anirudh Devgan is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Devgan, Anirudh, et al.. (2007). A Statistical Algorithm for Power- and Timing-Limited Parametric Yield Optimization of Large Integrated Circuits. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 26(10). 1790–1802. 16 indexed citations
2.
Zhang, Bin, et al.. (2005). Sleep transistor sizing using timing criticality and temporal currents. 1094–1094. 42 indexed citations
3.
Devgan, Anirudh, et al.. (2005). An efficient algorithm for statistical minimization of total power under timing yield constraints. 309–309. 99 indexed citations
4.
Blaauw, David, Anirudh Devgan, & Farid N. Najm. (2005). Leakage power. 1–1. 6 indexed citations
5.
Le, Jiayong, Larry Pileggi, & Anirudh Devgan. (2003). Circuit Simulation of Nanotechnology Devices with Non-monotonic I-V Characteristics. International Conference on Computer Aided Design. 491–496. 5 indexed citations
6.
Devgan, Anirudh & Chandramouli Kashyap. (2003). Block-based Static Timing Analysis with Uncertainty. International Conference on Computer Aided Design. 607–614. 159 indexed citations
7.
Rao, Rahul, J.L. Burns, Anirudh Devgan, & Richard B. Brown. (2003). Efficient techniques for gate leakage estimation. 100–100. 46 indexed citations
8.
Rao, Rahul, J.L. Burns, Anirudh Devgan, & Richard B. Brown. (2003). Efficient techniques for gate leakage estimation. 2 indexed citations
9.
Su, Haihua, Frank Liu, Anirudh Devgan, Erdem Acar, & Sani Nassif. (2003). Full chip leakage estimation considering power supply and temperature variations. 78–78. 200 indexed citations
10.
Alpert, Charles J., Frank Liu, Chandramouli Kashyap, & Anirudh Devgan. (2003). Delay and slew metrics using the lognormal distribution. 382–385. 26 indexed citations
11.
Alpert, Charles J., et al.. (2003). Delay and slew metrics using the lognormal distribution. 5 indexed citations
12.
Ji, Hao, Anirudh Devgan, & Wayne Dai. (2001). KSim. 379–384. 50 indexed citations
13.
Devgan, Anirudh, Hao Ji, & Wayne Dai. (2000). How to efficiently capture on-chip inductance effects: introducing a new circuit element K. International Conference on Computer Aided Design. 150–155. 111 indexed citations
14.
Devgan, Anirudh & P.R. O'Brien. (1999). Realizable reduction for RC interconnect circuits. International Conference on Computer Aided Design. 204–207. 15 indexed citations
15.
Nguyen, Tuyen, Anirudh Devgan, & Ali Naimi Sadigh. (1998). Simulation of coupling capacitances using matrix partitioning. 12–18. 5 indexed citations
16.
Devgan, Anirudh, Leon Stok, & Sandip Kundu. (1997). Timing analysis and optimization: from devices to systems (tutorial).. International Conference on Computer Aided Design. 2 indexed citations
17.
Devgan, Anirudh. (1997). Efficient coupled noise estimation for on-chip interconnects. International Conference on Computer Aided Design. 147–151. 115 indexed citations
18.
Dai, Wayne, et al.. (1997). Nosie and signal integrity in deep submicron design (panel). 720–721. 2 indexed citations
19.
Devgan, Anirudh. (1995). Efficient and accurate transient simulation in charge-voltage plane. International Conference on Computer Aided Design. 110–114. 1 indexed citations
20.
Devgan, Anirudh & Ronald A. Rohrer. (1993). Event driven adaptively controlled explicit simulation of integrated circuits. International Conference on Computer Aided Design. 136–140. 11 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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