S.G. Walker

1.2k total citations · 1 hit paper
9 papers, 853 citations indexed

About

S.G. Walker is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Computer Vision and Pattern Recognition. According to data from OpenAlex, S.G. Walker has authored 9 papers receiving a total of 853 indexed citations (citations by other indexed papers that have themselves been cited), including 9 papers in Electrical and Electronic Engineering, 2 papers in Hardware and Architecture and 1 paper in Computer Vision and Pattern Recognition. Recurrent topics in S.G. Walker's work include Low-power high-performance VLSI design (8 papers), Electromagnetic Compatibility and Noise Suppression (4 papers) and VLSI and FPGA Design Techniques (3 papers). S.G. Walker is often cited by papers focused on Low-power high-performance VLSI design (8 papers), Electromagnetic Compatibility and Noise Suppression (4 papers) and VLSI and FPGA Design Techniques (3 papers). S.G. Walker collaborates with scholars based in United States. S.G. Walker's co-authors include C. Visweswariah, Kerim Kalafala, Kaushik Ravindran, P.J. Restle, Jeffrey G. Hemmett, N. Venkateswaran, A.E. Ruehli, George Α. Papadopoulos, Albert E. Ruehli and Simon Y. Foo and has published in prestigious journals such as Proceedings of the IEEE, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE.

In The Last Decade

S.G. Walker

9 papers receiving 815 citations

Hit Papers

align trajectories

What are hit papers?

Hit papers significantly outperform the citation benchmark for their cohort. A paper qualifies if it has ≥500 total citations, achieves ≥1.5× the top-1% citation threshold for papers in the same subfield and year (this is the minimum needed to enter the top 1%, not the average within it), or reaches the top citation threshold in at least one of its specific research topics.

First-order incremental block-based statistical timing analysis

2004 514 citations C. Visweswariah, Kaushik Ravindran et al. profile →

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
S.G. Walker United States	7	792	535	60	43	40	9	853
Rajendran Panda United States	16	1.0k 1.3×	469 0.9×	53 0.9×	50 1.2×	59 1.5×	40	1.1k
Anirudh Devgan United States	18	1.5k 1.9×	811 1.5×	92 1.5×	46 1.1×	189 4.7×	42	1.6k
Chandramouli Kashyap United States	17	940 1.2×	626 1.2×	74 1.2×	30 0.7×	53 1.3×	38	982
G. Katopis United States	15	965 1.2×	158 0.3×	78 1.3×	23 0.5×	74 1.9×	63	1.0k
Ken Kundert United States	11	440 0.6×	133 0.2×	112 1.9×	57 1.3×	32 0.8×	26	513
Ronald A. Rohrer United States	11	381 0.5×	117 0.2×	38 0.6×	39 0.9×	21 0.5×	21	452
Joseph Kozhaya United States	11	485 0.6×	202 0.4×	20 0.3×	65 1.5×	56 1.4×	20	531
Haihua Su United States	13	657 0.8×	269 0.5×	28 0.5×	28 0.7×	93 2.3×	26	753
Nagib Hakim United States	14	407 0.5×	295 0.6×	62 1.0×	21 0.5×	34 0.8×	37	512
S.S. Mahant-Shetti United States	8	241 0.3×	98 0.2×	54 0.9×	38 0.9×	26 0.7×	20	330

Countries citing papers authored by S.G. Walker

Since Specialization

Citations

This map shows the geographic impact of S.G. Walker's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by S.G. Walker with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites S.G. Walker more than expected).

Fields of papers citing papers by S.G. Walker

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by S.G. Walker. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by S.G. Walker. The network helps show where S.G. Walker may publish in the future.

Co-authorship network of co-authors of S.G. Walker

This figure shows the co-authorship network connecting the top 25 collaborators of S.G. Walker. A scholar is included among the top collaborators of S.G. Walker based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with S.G. Walker. S.G. Walker is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

Sort: Min cites: Since: Top N: Style:

9 of 9 papers shown

1.

Das, Koushik K., S.G. Walker, & Manjul Bhushan. (2007). An Integrated CAD Methodology for Evaluating MOSFET and Parasitic Extraction Models and Variability. Proceedings of the IEEE. 95(3). 670–687. 5 indexed citations

2.

Visweswariah, C., Kaushik Ravindran, Kerim Kalafala, et al.. (2006). First-Order Incremental Block-Based Statistical Timing Analysis. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 25(10). 2170–2180. 185 indexed citations

3.

Visweswariah, C., et al.. (2004). First-order incremental block-based statistical timing analysis. 331–336. 514 indexed citations breakdown →

4.

Walker, S.G., et al.. (2002). CPAM: a common power analysis methodology for high-performance VLSI design. 303–306. 20 indexed citations

5.

Walker, S.G. & Simon Y. Foo. (2002). Evaluating metastability in electronic circuits for random number generation. 99–101. 10 indexed citations

6.

Restle, P.J., A.E. Ruehli, S.G. Walker, & George Α. Papadopoulos. (2001). Full-wave PEEC time-domain method for the modeling of on-chip interconnects. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 20(7). 877–886. 77 indexed citations

7.

Restle, P.J., Albert E. Ruehli, & S.G. Walker. (2001). Multi-GHz interconnect effects in microprocessors. 93–97. 9 indexed citations

8.

Restle, P.J., Albert E. Ruehli, & S.G. Walker. (1999). Dealing with inductance in high-speed chip design. 904–909. 31 indexed citations

9.

Rogers, D.L., S.G. Walker, S. Gowda, & H. Ainspan. (1995). <title>Design, fabrication, and automated testing of 32-channel integrated MSM/MESFET optoelectronic integrated circuit (OEIC) receiver arrays</title>. Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE. 2400. 296–299. 2 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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