T.M. Niermann
Impact in
- Hardware and Architecture top 0.5%
- VLSI and Analog Circuit Testing
- Embedded Systems Design Techniques
- Software top 5%
- Software Testing and Debugging Techniques
Papers in
-
- VLSI and Analog Circuit Testing 9
-
- Integrated Circuits and Semiconductor Failure Analysis 9
- Radiation Effects in Electronics 4
- VLSI and FPGA Design Techniques 3
- Co-authors
- J.H. Patel (8 shared papers)Wu-Tung Cheng (2 shared papers)E.M. Rudnick (3 shared papers)Jacob A. Abraham (2 shared papers)Ranjan Roy (2 shared papers)R.A. Saleh (1 shared paper)
- Journals
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (3 papers)Illinois Digital Environment for Access to Learning and Scholarship (University of Illinois at Urbana-Champaign) (1 paper)
- Partner nations
- United States
In The Last Decade
T.M. Niermann
9 papers receiving 802 citations
T.M. Niermann's Hit Papers
Peers
Comparison fields: 5 of 29
- Hardware and Architecture 806
- Software 100
- Electrical and Electronic Engineering 765
- Control and Systems Engineering 93
- Computational Theory and Mathematics 34
Countries citing papers authored by T.M. Niermann
This map shows the geographic impact of T.M. Niermann's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by T.M. Niermann with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites T.M. Niermann more than expected).
Fields of papers citing papers by T.M. Niermann
This network shows the impact of papers produced by T.M. Niermann. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by T.M. Niermann. The network helps show where T.M. Niermann may publish in the future.
Co-authors
The 6 scholars most cited alongside T.M. Niermann, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | HITEC: a test generation package for sequential circuits Hit paper breakdown → | 2002 | 309 |
| 2 | 1992 | 193 | |
| 3 | 1994 | 103 | |
| 4 | 1990 | 78 | |
| 5 | 1997 | 58 | |
| 6 | 1992 | 51 | |
| 7 | 2003 | 17 | |
| 8 | 2002 | 16 | |
| 9 | Techniques for sequential circuit automatic test generation | 1991 | 14 |
About T.M. Niermann
T.M. Niermann is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering, Molecular Biology, Control and Systems Engineering and Infectious Diseases, having authored 9 papers that have together received 839 indexed citations. Recurring topics across this work include Integrated Circuits and Semiconductor Failure Analysis (9 papers), VLSI and Analog Circuit Testing (9 papers), Radiation Effects in Electronics (4 papers), VLSI and FPGA Design Techniques (3 papers), Protein Degradation and Inhibitors (1 paper) and Engineering and Test Systems (1 paper). The work is most often cited by research in Hardware and Architecture (806 citations), Software (100 citations), Electrical and Electronic Engineering (765 citations), Control and Systems Engineering (93 citations) and Computational Theory and Mathematics (34 citations). T.M. Niermann has collaborated with scholars based in United States. Frequent co-authors include J.H. Patel, Wu-Tung Cheng, E.M. Rudnick, Jacob A. Abraham, Ranjan Roy and R.A. Saleh. Their work appears in journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and Illinois Digital Environment for Access to Learning and Scholarship (University of Illinois at Urbana-Champaign).
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.