Theo Smedes
About
In The Last Decade
Theo Smedes
57 papers receiving 466 citations
Peers
Comparison fields: 5 of 21
- Electrical and Electronic Engineering 511
- Hardware and Architecture 64
- Atomic and Molecular Physics, and Optics 23
- Biomedical Engineering 21
- Control and Systems Engineering 12
Countries citing papers authored by Theo Smedes
This map shows the geographic impact of Theo Smedes's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Theo Smedes with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Theo Smedes more than expected).
Fields of papers citing papers by Theo Smedes
This network shows the impact of papers produced by Theo Smedes. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Theo Smedes. The network helps show where Theo Smedes may publish in the future.
Co-authorship network of co-authors of Theo Smedes
This figure shows the co-authorship network connecting the top 25 collaborators of Theo Smedes. A scholar is included among the top collaborators of Theo Smedes based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Theo Smedes. Theo Smedes is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 10 | |
| 2 | 5 | |
| 3 | Characterization methods to replicate EOS fails | 3 |
| 4 | ESD protection circuit for a sub-1dB noise figure LNA in a SiGe:C BiCMOS technology | 1 |
| 5 | Analysis of ESD fails in a 45 nm mixed signal SoC | 1 |
| 6 | HMM round robin study: What to expect when testing components to the IEC 61000-4-2 waveform | 7 |
| 7 | A contribution to the evaluation of HMM for IO design | 3 |
| 8 | Predictive CDM simulation approach based on tester, package and full integrated circuit modeling | 3 |
| 9 | A methodology for the ESD test reduction for complex devices | 3 |
| 10 | On the relevance of IC ESD performance to product quality | 10 |
| 11 | 15 | |
| 12 | ESD protection for high-voltage CMOS technologies | 25 |
| 13 | ESD phenomena in interconnect structures | 12 |
| 14 | ESD protection by keep-on design for a 550 V fluorescent lamp control IC with integrated LDMOS power stage | 6 |
| 15 | The application of Transmission Line Pulse testing for the ESD analysis of integrated circuits | 5 |
| 16 | A simple model for analogue applications of dynamic threshold MOSTs | 1 |
| 17 | 40 | |
| 18 | 4 | |
| 19 | 55 | |
| 20 | 2 |
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.