T. Yoshihara

870 total citations
43 papers, 609 citations indexed

About

T. Yoshihara is a scholar working on Electrical and Electronic Engineering, Computer Networks and Communications and Hardware and Architecture. According to data from OpenAlex, T. Yoshihara has authored 43 papers receiving a total of 609 indexed citations (citations by other indexed papers that have themselves been cited), including 37 papers in Electrical and Electronic Engineering, 11 papers in Computer Networks and Communications and 10 papers in Hardware and Architecture. Recurrent topics in T. Yoshihara's work include Semiconductor materials and devices (30 papers), Low-power high-performance VLSI design (15 papers) and Advancements in Semiconductor Devices and Circuit Design (14 papers). T. Yoshihara is often cited by papers focused on Semiconductor materials and devices (30 papers), Low-power high-performance VLSI design (15 papers) and Advancements in Semiconductor Devices and Circuit Design (14 papers). T. Yoshihara collaborates with scholars based in Japan, United States and Germany. T. Yoshihara's co-authors include Takao Nakano, Keiko Anami, S. Kayano, K. Fujishima, Hiromitsu Takagi, Hirofumi Shinohara, Shijo Nagao, Masahiko Yoshimoto, K. Dosaka and Hideto Hidaka and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Electron Devices and IEEE Transactions on Applied Superconductivity.

In The Last Decade

T. Yoshihara

39 papers receiving 572 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
T. Yoshihara Japan 14 501 244 157 56 20 43 609
Min Pan United States 12 645 1.3× 476 2.0× 168 1.1× 25 0.4× 22 1.1× 27 704
R. Franch United States 15 588 1.2× 224 0.9× 74 0.5× 63 1.1× 11 0.6× 44 663
T. Hamamoto Japan 13 574 1.1× 147 0.6× 82 0.5× 53 0.9× 12 0.6× 46 633
Norman J. Rohrer United States 11 838 1.7× 307 1.3× 76 0.5× 99 1.8× 18 0.9× 23 891
D. Stark United States 11 375 0.7× 145 0.6× 69 0.4× 235 4.2× 40 2.0× 29 540
Michele Petracca United States 15 506 1.0× 212 0.9× 282 1.8× 48 0.9× 49 2.5× 32 699
Jin-Tai Yan Taiwan 12 511 1.0× 227 0.9× 173 1.1× 42 0.8× 48 2.4× 128 551
A. Maheshwari United States 9 481 1.0× 170 0.7× 62 0.4× 61 1.1× 12 0.6× 17 509
Kyu-Myung Choi South Korea 14 485 1.0× 304 1.2× 158 1.0× 34 0.6× 13 0.7× 62 637
Stefan Rusu United States 15 808 1.6× 539 2.2× 272 1.7× 78 1.4× 16 0.8× 41 959

Countries citing papers authored by T. Yoshihara

Since Specialization
Citations

This map shows the geographic impact of T. Yoshihara's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by T. Yoshihara with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites T. Yoshihara more than expected).

Fields of papers citing papers by T. Yoshihara

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by T. Yoshihara. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by T. Yoshihara. The network helps show where T. Yoshihara may publish in the future.

Co-authorship network of co-authors of T. Yoshihara

This figure shows the co-authorship network connecting the top 25 collaborators of T. Yoshihara. A scholar is included among the top collaborators of T. Yoshihara based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with T. Yoshihara. T. Yoshihara is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Yoshihara, T., M. Inagaki, Tatsuoki Nagaishi, et al.. (2025). Development of Fluorine-Free MOD REBCO Tape With BaHfO3 Artificial Pinning Centers. IEEE Transactions on Applied Superconductivity. 35(5). 1–6. 1 indexed citations
2.
Yoshihara, T., Tatsuoki Nagaishi, Shinichi Kobayashi, et al.. (2023). BaMO3 (M = Zr, Hf) Doped REBCO Tapes Fabricated by Fluorine-Free MOD. IEEE Transactions on Applied Superconductivity. 33(5). 1–5. 8 indexed citations
3.
Nakayama, Toshinori, Shusuke Kawai, Yasushi Terada, et al.. (2002). Row-redundancy scheme for high-density flash memory. 150–151. 4 indexed citations
4.
Terada, Yasushi, et al.. (2002). A 3.3 V-only 16 Mb DINOR flash memory. 122–123,. 16 indexed citations
5.
Kato, T., T. Hamamoto, Masatoshi Akiyama, et al.. (2000). A 0.18-/spl mu/m 256-Mb DDR-SDRAM with low-cost post-mold tuning method for DLL replica. IEEE Journal of Solid-State Circuits. 35(11). 1680–1689. 7 indexed citations
6.
Hamamoto, T., et al.. (2000). A precharged-capacitor-assisted sensing (PCAS) scheme with novel level controllers for low-power DRAMs. IEEE Journal of Solid-State Circuits. 35(8). 1179–1185. 4 indexed citations
7.
Dosaka, K., et al.. (1992). A 100-MHz 4-Mb cache DRAM with fast copy-back scheme. IEEE Journal of Solid-State Circuits. 27(11). 1534–1539. 17 indexed citations
9.
Dosaka, K., et al.. (1990). A 38 ns 4 Mb DRAM with a battery back-up (BBU) mode. 230–231. 3 indexed citations
10.
Terada, Yasushi, K. Kobayashi, Toshinori Nakayama, et al.. (1989). 120-ns 128 K*8-bit/64 K*16-bit CMOS EEPROMs. IEEE Journal of Solid-State Circuits. 24(5). 1244–1249. 2 indexed citations
11.
Mashiko, K., Kazutami Arimoto, Yoshio Matsuda, et al.. (1987). A 90ns 4Mb DRAM in a 300 mil DIP. 12–13. 13 indexed citations
12.
Fujishima, K., K. Tsukamoto, Yasumitsu Nishimura, et al.. (1985). A 90ns 1Mb DRAM with multi-bit test mode. 240–241. 20 indexed citations
13.
Shinohara, Hirofumi, Keiko Anami, T. Yoshihara, et al.. (1985). A fast 8K × 8 mixed CMOS static RAM. IEEE Transactions on Electron Devices. 32(9). 1792–1796. 3 indexed citations
14.
Fujishima, K., et al.. (1985). A reliable 1-Mbit DRAM with a multi-bit-test mode. IEEE Journal of Solid-State Circuits. 20(5). 909–913. 14 indexed citations
15.
Matsukawa, Takashi, M. Inuishi, Masaki Hirayama, et al.. (1984). A highly reliable N-MOS process for one megabit dynamic random access memory. 647–650. 2 indexed citations
16.
Anami, Keiko, et al.. (1984). A High Latch-Up Immunity Full CMOS RAM. 12–13. 2 indexed citations
17.
Yoshimoto, Masahiko, Keiko Anami, Hirofumi Shinohara, et al.. (1983). A 64Kb full CMOS RAM with divided word line structure. 58–59. 34 indexed citations
18.
Yoshihara, T., Satoshi Takano, Motoi Kimata, & Takao Nakano. (1981). Degradation of refresh time in dynamic MOS RAM by irradiation of alpha particles. IEEE Transactions on Electron Devices. 28(10). 1198–1199. 6 indexed citations
19.
Taniguchi, Makoto, et al.. (1981). Fully boosted 64K dynamic RAM with automatic and self-refresh. IEEE Journal of Solid-State Circuits. 16(5). 492–498. 4 indexed citations
20.
Yamada, M., Makoto Taniguchi, T. Yoshihara, et al.. (1980). Soft error improvement of dynamic RAM with Hi-C structure. 578–581. 16 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

Explore authors with similar magnitude of impact

Rankless by CCL
2026