K. Dosaka
- Electrical and Electronic Engineering top 10%
- Hardware and Architecture top 2%
- Computer Networks and Communications top 5%
- Artificial Intelligence
- Computer Vision and Pattern Recognition
- Co-authors
- Kazutami ArimotoHaruhiko NodaT. YoshiharaFukashi MorishitaTetsushi KoideH. YamasakiHans Jürgen MattauschNaoya Watanabe
- Topics
- Low-power high-performance VLSI design (24 papers)Interconnection Networks and Systems (18 papers)Parallel Computing and Optimization Techniques (17 papers)
- Cited by
- Hardware and ArchitectureComputer Networks and CommunicationsElectrical and Electronic Engineering
- Journals
- IEEE Journal of Solid-State CircuitsIEICE Transactions on ElectronicsIEICE Transactions on Information and Systems
- Partner nations
- JapanUnited States
In The Last Decade
K. Dosaka
51 papers receiving 466 citations
Peers
Comparison fields: 5 of 29
- Electrical and Electronic Engineering 320
- Hardware and Architecture 293
- Computer Networks and Communications 186
- Artificial Intelligence 54
- Computer Vision and Pattern Recognition 50
Countries citing papers authored by K. Dosaka
This map shows the geographic impact of K. Dosaka's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by K. Dosaka with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites K. Dosaka more than expected).
Fields of papers citing papers by K. Dosaka
This network shows the impact of papers produced by K. Dosaka. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by K. Dosaka. The network helps show where K. Dosaka may publish in the future.
Co-authorship network of co-authors of K. Dosaka
This figure shows the co-authorship network connecting the top 25 collaborators of K. Dosaka. A scholar is included among the top collaborators of K. Dosaka based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with K. Dosaka. K. Dosaka is excluded from the visualization to improve readability, since they are connected to all nodes in the network.
All Works
| # | Work | Indexed citations |
|---|---|---|
| 1 | 3 | |
| 2 | 3 | |
| 3 | Super parallel SIMD processor with CAM based high-speed pattern matching capability | 2 |
| 4 | A super parallel SIMD processor with Time/Space conversion Bus Bridge on the Matrix Architecture | 5 |
| 5 | 2 | |
| 6 | Highly Parallel Huffman Encoding by Exploiting Multiple-Matches in Content Addressable Memory | 1 |
| 7 | 9 | |
| 8 | 4 | |
| 9 | 10 | |
| 10 | 3 | |
| 11 | 2 | |
| 12 | 16 | |
| 13 | An Embedded DRAM Hybrid Macro with Auto Signal Management and Enhanced-on-Chip Tester | 3 |
| 14 | 3 | |
| 15 | 2 | |
| 16 | Trends in High-Speed DRAM Architectures | 6 |
| 17 | Trends in High-Speed DRAM Architectures (Special Issue on Ultra-High-Speed LSIs) | 2 |
| 18 | A fully Synchronous Circuit design for embedded DRAM | 2 |
| 19 | 17 | |
| 20 | 1 |
About K. Dosaka
K. Dosaka is a scholar working on Hardware and Architecture, Computer Networks and Communications and Electrical and Electronic Engineering, having authored 52 papers that have together received 500 indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (24 papers), Interconnection Networks and Systems (18 papers) and Parallel Computing and Optimization Techniques (17 papers). The work is most often cited by research in Hardware and Architecture (293 citations), Computer Networks and Communications (186 citations) and Electrical and Electronic Engineering (320 citations). K. Dosaka has collaborated with scholars based in Japan and United States. Frequent co-authors include Kazutami Arimoto, Haruhiko Noda, T. Yoshihara, Fukashi Morishita, Tetsushi Koide, H. Yamasaki, Hans Jürgen Mattausch, Naoya Watanabe, Hiroyuki Kawai and Koji Nii. Their work appears in journals such as IEEE Journal of Solid-State Circuits, IEICE Transactions on Electronics and IEICE Transactions on Information and Systems.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.