Seong‐Ook Jung

3.0k total citations
193 papers, 2.3k citations indexed

About

Seong‐Ook Jung is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Biomedical Engineering. According to data from OpenAlex, Seong‐Ook Jung has authored 193 papers receiving a total of 2.3k indexed citations (citations by other indexed papers that have themselves been cited), including 185 papers in Electrical and Electronic Engineering, 38 papers in Hardware and Architecture and 34 papers in Biomedical Engineering. Recurrent topics in Seong‐Ook Jung's work include Semiconductor materials and devices (90 papers), Advancements in Semiconductor Devices and Circuit Design (76 papers) and Low-power high-performance VLSI design (76 papers). Seong‐Ook Jung is often cited by papers focused on Semiconductor materials and devices (90 papers), Advancements in Semiconductor Devices and Circuit Design (76 papers) and Low-power high-performance VLSI design (76 papers). Seong‐Ook Jung collaborates with scholars based in South Korea, United States and United Kingdom. Seong‐Ook Jung's co-authors include Seung H. Kang, Taehui Na, Jung Pill Kim, Kyungho Ryu, Ji Su Kim, Hanwool Jeong, Tae Woo Oh, Juhyun Park, Keonhee Cho and Sung-Mo Kang and has published in prestigious journals such as Advanced Functional Materials, ACS Applied Materials & Interfaces and IEEE Access.

In The Last Decade

Seong‐Ook Jung

177 papers receiving 2.2k citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Seong‐Ook Jung South Korea 25 2.0k 373 355 337 132 193 2.3k
Marco Lanuzza Italy 23 1.4k 0.7× 474 1.3× 215 0.6× 310 0.9× 46 0.3× 133 1.7k
Jae‐Jin Lee South Korea 17 696 0.3× 268 0.7× 72 0.2× 296 0.9× 112 0.8× 106 1.2k
Jeong‐Gun Lee South Korea 17 639 0.3× 1.3k 3.4× 58 0.2× 120 0.4× 85 0.6× 103 1.9k
Wei Hwang Taiwan 22 1.6k 0.8× 273 0.7× 162 0.5× 320 0.9× 190 1.4× 178 1.9k
Ya‐Chin King Taiwan 26 3.1k 1.6× 257 0.7× 210 0.6× 265 0.8× 516 3.9× 230 3.3k
Man‐Kay Law Macao 24 1.7k 0.9× 1.1k 3.0× 51 0.1× 106 0.3× 53 0.4× 153 2.2k
R. Thewes Germany 28 1.9k 1.0× 1.2k 3.3× 127 0.4× 138 0.4× 49 0.4× 132 3.0k
Adam Teman Israel 23 1.2k 0.6× 93 0.2× 59 0.2× 363 1.1× 25 0.2× 112 1.3k
P. Buchmann Switzerland 25 1.3k 0.6× 459 1.2× 299 0.8× 75 0.2× 58 0.4× 80 1.9k
Yu-Der Chih Taiwan 31 2.2k 1.1× 103 0.3× 217 0.6× 395 1.2× 111 0.8× 80 2.4k

Countries citing papers authored by Seong‐Ook Jung

Since Specialization
Citations

This map shows the geographic impact of Seong‐Ook Jung's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Seong‐Ook Jung with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Seong‐Ook Jung more than expected).

Fields of papers citing papers by Seong‐Ook Jung

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Seong‐Ook Jung. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Seong‐Ook Jung. The network helps show where Seong‐Ook Jung may publish in the future.

Co-authorship network of co-authors of Seong‐Ook Jung

This figure shows the co-authorship network connecting the top 25 collaborators of Seong‐Ook Jung. A scholar is included among the top collaborators of Seong‐Ook Jung based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Seong‐Ook Jung. Seong‐Ook Jung is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Cho, Keonhee, et al.. (2025). Asymmetric Voltage Latch Type and Ultra-Low Swing Bitline Sense Amplifiers for Low-Power High-Density 1R1W 8T SRAM in 14 nm FinFET. IEEE Transactions on Circuits and Systems I Regular Papers. 72(12). 7769–7779.
2.
3.
Park, Juhyun, et al.. (2024). A Contention-Free Wordline Supporting Circuit for High Wordline Resistance in Sub-10-nm SRAM Designs. IEEE Transactions on Circuits & Systems II Express Briefs. 71(10). 4531–4535.
4.
Zhang, Lingwei, et al.. (2024). Design Guidelines of Hafnia Ferroelectrics and Gate-Stack for Multilevel-Cell FeFET. IEEE Transactions on Electron Devices. 71(3). 1865–1871. 4 indexed citations
5.
Jung, Seong‐Ook, et al.. (2023). High-Precision and Low-Power Offset Canceling Tri-State Sensing Latch in NAND Flash Memory. IEEE Transactions on Circuits & Systems II Express Briefs. 70(7). 2325–2329. 1 indexed citations
6.
Lee, Youngkwan, et al.. (2022). Effect of Floating Gate Insertion on the Analog States of Ferroelectric Field-Effect Transistors. IEEE Transactions on Electron Devices. 70(1). 349–353. 11 indexed citations
7.
Hwang, Junghyeon, et al.. (2022). Non-Volatile Majority Function Logic Using Ferroelectric Memory for Logic in Memory Technology. IEEE Electron Device Letters. 43(7). 1049–1052. 11 indexed citations
8.
Oh, Tae Woo, et al.. (2022). Local Bit-Line SRAM Architecture With Data-Aware Power-Gating Write Assist. IEEE Transactions on Circuits & Systems II Express Briefs. 70(1). 306–310. 2 indexed citations
9.
Jung, Seong‐Ook, et al.. (2021). All-Bit-Line Read Scheme With Locking Bit-Line and Amplifying Sense Node in NAND Flash. IEEE Access. 9. 28001–28011. 9 indexed citations
10.
Cho, Keonhee, et al.. (2021). SRAM Write Assist Circuit Using Cell Supply Voltage Self-Collapse With Bitline Charge Sharing for Near-Threshold Operation. IEEE Transactions on Circuits & Systems II Express Briefs. 69(3). 1567–1571. 7 indexed citations
11.
Park, Juhyun, et al.. (2021). Differential Read/Write 7T SRAM With Bit-Interleaved Structure for Near-Threshold Operation. IEEE Access. 9. 64105–64115. 17 indexed citations
12.
Cho, Keonhee, Juhyun Park, Tae Woo Oh, & Seong‐Ook Jung. (2020). One-Sided Schmitt-Trigger-Based 9T SRAM Cell for Near-Threshold Operation. IEEE Transactions on Circuits and Systems I Regular Papers. 67(5). 1551–1561. 84 indexed citations
13.
Jeong, Hanwool, et al.. (2020). An Embedded Level-Shifting Dual-Rail SRAM for High-Speed and Low-Power Cache. IEEE Access. 8. 187126–187139. 14 indexed citations
14.
Park, Juhyun, Tae Woo Oh, & Seong‐Ook Jung. (2020). pMOS Pass Gate Local Bitline SRAM Architecture With Virtual $V_{\mathrm{SS}}$ for Near-Threshold Operation. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 28(4). 1079–1083. 6 indexed citations
15.
Na, Taehui, et al.. (2016). Offset-Canceling Current-Sampling Sense Amplifier for Resistive Nonvolatile Memory in 65 nm CMOS. IEEE Journal of Solid-State Circuits. 52(2). 496–504. 46 indexed citations
16.
Ryu, Kyungho, et al.. (2014). Process-Variation-Calibrated Multiphase Delay Locked Loop With a Loop-Embedded Duty Cycle Corrector. IEEE Transactions on Circuits & Systems II Express Briefs. 61(1). 1–5. 33 indexed citations
17.
Kang, Han Chang, et al.. (2010). Offset voltage estimation model for latch-type sense amplifiers. IET Circuits Devices & Systems. 4(6). 503–513. 35 indexed citations
18.
Park, Sang Kyu, et al.. (2008). A dual-edge triggered phase detector for fast-lock DLL. International Conference on Circuits. 197–201. 2 indexed citations
19.
Jung, Seong‐Ook, K. W. Kim, & Sung-Mo Kang. (2003). Optimal timing for skew-tolerant high-speed domino logic. 41–46. 3 indexed citations
20.
Jung, Seong‐Ook, K. W. Kim, & Sung-Mo Kang. (2002). Dual Threshold Voltage Domino Logic Synthesis for High Performance with Noise and Power Constraint. Design, Automation, and Test in Europe. 260–265. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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