R.S. Gyurcsik

1.0k total citations
37 papers, 772 citations indexed

About

R.S. Gyurcsik is a scholar working on Electrical and Electronic Engineering, Hardware and Architecture and Industrial and Manufacturing Engineering. According to data from OpenAlex, R.S. Gyurcsik has authored 37 papers receiving a total of 772 indexed citations (citations by other indexed papers that have themselves been cited), including 27 papers in Electrical and Electronic Engineering, 8 papers in Hardware and Architecture and 8 papers in Industrial and Manufacturing Engineering. Recurrent topics in R.S. Gyurcsik's work include VLSI and FPGA Design Techniques (8 papers), Low-power high-performance VLSI design (8 papers) and VLSI and Analog Circuit Testing (7 papers). R.S. Gyurcsik is often cited by papers focused on VLSI and FPGA Design Techniques (8 papers), Low-power high-performance VLSI design (8 papers) and VLSI and Analog Circuit Testing (7 papers). R.S. Gyurcsik collaborates with scholars based in United States. R.S. Gyurcsik's co-authors include P.K. McLarty, Ralph K. Cavin, J.J. Paulos, F. Y. Sorrell, Jye‐Chyi Lu, B. L. Bhuva, Jeng‐Ping Lu, P.K. Mozumder, Jacqueline M. Hughes‐Oliver and Martha Gardner and has published in prestigious journals such as Journal of the American Statistical Association, Journal of The Electrochemical Society and IEEE Journal of Solid-State Circuits.

In The Last Decade

R.S. Gyurcsik

35 papers receiving 744 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
R.S. Gyurcsik United States 14 332 318 165 133 84 37 772
M.A. Styblinski United States 12 54 0.2× 333 1.0× 148 0.9× 124 0.9× 39 0.5× 54 641
Carlos Carreras Spain 13 22 0.1× 203 0.6× 175 1.1× 156 1.2× 124 1.5× 56 511
K. Antreich Germany 20 55 0.2× 1.4k 4.4× 1.1k 6.6× 233 1.8× 45 0.5× 45 1.6k
Kenneth P. Parker United States 14 41 0.1× 906 2.8× 799 4.8× 94 0.7× 189 2.3× 42 1.1k
Michael Lightner United States 11 18 0.1× 178 0.6× 121 0.7× 86 0.6× 49 0.6× 37 438
J.A.G. Jess Netherlands 20 55 0.2× 717 2.3× 768 4.7× 107 0.8× 22 0.3× 77 1.0k
Bryan Preas United States 17 137 0.4× 689 2.2× 448 2.7× 76 0.6× 25 0.3× 38 859
A.H. Jones United Kingdom 11 77 0.2× 52 0.2× 23 0.1× 143 1.1× 343 4.1× 49 625
C. Maffezzoni Italy 17 90 0.3× 101 0.3× 28 0.2× 180 1.4× 519 6.2× 67 821
Andrey Morozov Germany 12 38 0.1× 51 0.2× 23 0.1× 244 1.8× 129 1.5× 133 533

Countries citing papers authored by R.S. Gyurcsik

Since Specialization
Citations

This map shows the geographic impact of R.S. Gyurcsik's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by R.S. Gyurcsik with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites R.S. Gyurcsik more than expected).

Fields of papers citing papers by R.S. Gyurcsik

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by R.S. Gyurcsik. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by R.S. Gyurcsik. The network helps show where R.S. Gyurcsik may publish in the future.

Co-authorship network of co-authors of R.S. Gyurcsik

This figure shows the co-authorship network connecting the top 25 collaborators of R.S. Gyurcsik. A scholar is included among the top collaborators of R.S. Gyurcsik based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with R.S. Gyurcsik. R.S. Gyurcsik is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Paulos, J.J., et al.. (2002). An analog VLSI neural network architecture with on-chip learning. 3. 1364–1368. 1 indexed citations
2.
Gyurcsik, R.S., et al.. (2002). Performance-driven evaluation of bipolar analog layouts. 827–830.
3.
Hughes‐Oliver, Jacqueline M., et al.. (1998). Achieving Uniformity in a Semiconductor Fabrication Process using Spatial Modeling. Journal of the American Statistical Association. 93(441). 36–45. 12 indexed citations
4.
Hughes‐Oliver, Jacqueline M., et al.. (1998). Achieving Uniformity in a Semiconductor Fabrication Process Using Spatial Modeling. Journal of the American Statistical Association. 93(441). 36–36. 2 indexed citations
5.
Gyurcsik, R.S., et al.. (1997). Toward a general-purpose analog VLSI neural network with on-chip learning. IEEE Transactions on Neural Networks. 8(2). 413–423. 49 indexed citations
6.
Gyurcsik, R.S., et al.. (1997). An analog VLSI neural network with on-chip perturbation learning. IEEE Journal of Solid-State Circuits. 32(4). 535–543. 29 indexed citations
7.
Gyurcsik, R.S., et al.. (1996). A robust metric for measuring within-wafer uniformity. 19(4). 283–289. 2 indexed citations
8.
Hughes‐Oliver, Jacqueline M., et al.. (1996). Improved Within‐Wafer Uniformity Modeling Through the Use of Maximum‐Likelihood Estimation of the Mean and Covariance Surfaces. Journal of The Electrochemical Society. 143(10). 3404–3409. 3 indexed citations
9.
Gyurcsik, R.S., et al.. (1995). Thermal uniformity and stress minimization during rapid thermal processes. IEEE Transactions on Semiconductor Manufacturing. 8(3). 272–279. 21 indexed citations
10.
McLarty, P.K., et al.. (1994). Single-wafer cluster tool performance: an analysis of throughput. IEEE Transactions on Semiconductor Manufacturing. 7(3). 369–373. 177 indexed citations
11.
Gyurcsik, R.S., et al.. (1993). Simple and efficient 2D and 3D span clipping algorithms. Computers & Graphics. 17(1). 39–54. 5 indexed citations
12.
Gyurcsik, R.S., et al.. (1993). Rapid Thermal Processor Modeling, Control, and Design for Temperature Uniformity. MRS Proceedings. 303. 7 indexed citations
13.
Paulos, J.J., et al.. (1993). Hierarchical yield estimation of large analog integrated circuits. IEEE Journal of Solid-State Circuits. 28(3). 203–209. 22 indexed citations
14.
Carley, L.R. & R.S. Gyurcsik. (1993). Computer-Aided Design of Analog Circuits and Systems. 1 indexed citations
15.
Gyurcsik, R.S., et al.. (1992). <title>Application of modern quality improvement techniques to rapid thermal processing</title>. Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE. 1595. 39–51. 2 indexed citations
16.
Paulos, J.J., et al.. (1992). Hierarchical yield estimation of large analog integrated circuits. 3.2.1–3.2.4. 22 indexed citations
17.
Gyurcsik, R.S., et al.. (1991). Generation of performance sensitivities for analog cell layout. 500–505. 6 indexed citations
18.
Gyurcsik, R.S., et al.. (1990). Improving line segment clipping. 15(7). 36–45. 5 indexed citations
19.
Sorrell, F. Y., et al.. (1990). A global model for rapid thermal processors. IEEE Transactions on Semiconductor Manufacturing. 3(4). 183–188. 15 indexed citations
20.
Gyurcsik, R.S., et al.. (1989). A generalized approach to routing mixing analog and digital signal nets in a channel. IEEE Journal of Solid-State Circuits. 24(2). 436–442. 33 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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