R. Hori

418 total citations
28 papers, 309 citations indexed

About

R. Hori is a scholar working on Electrical and Electronic Engineering, Computer Networks and Communications and Hardware and Architecture. According to data from OpenAlex, R. Hori has authored 28 papers receiving a total of 309 indexed citations (citations by other indexed papers that have themselves been cited), including 26 papers in Electrical and Electronic Engineering, 4 papers in Computer Networks and Communications and 3 papers in Hardware and Architecture. Recurrent topics in R. Hori's work include Semiconductor materials and devices (23 papers), Advancements in Semiconductor Devices and Circuit Design (21 papers) and Low-power high-performance VLSI design (13 papers). R. Hori is often cited by papers focused on Semiconductor materials and devices (23 papers), Advancements in Semiconductor Devices and Circuit Design (21 papers) and Low-power high-performance VLSI design (13 papers). R. Hori collaborates with scholars based in Japan and United Kingdom. R. Hori's co-authors include K. Itoh, H. Kawamoto, H. Masuda, Y. Kamigaki, J. Etoh, H. Katto, Y. Kawajiri, H. Sunami, K. Yagi and S. Asai and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Electron Devices and Japanese Journal of Applied Physics.

In The Last Decade

R. Hori

27 papers receiving 298 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
R. Hori Japan 11 301 34 34 18 10 28 309
G. Kitsukawa Japan 11 288 1.0× 50 1.5× 50 1.5× 23 1.3× 7 0.7× 22 297
J. Etoh Japan 10 307 1.0× 40 1.2× 71 2.1× 26 1.4× 11 1.1× 25 333
H. Takato Japan 10 338 1.1× 12 0.4× 66 1.9× 13 0.7× 14 1.4× 27 350
D. Hoyniak United States 7 262 0.9× 63 1.9× 19 0.6× 26 1.4× 9 0.9× 8 282
T.W. Houston United States 10 234 0.8× 64 1.9× 14 0.4× 10 0.6× 15 1.5× 32 261
Kiyoo Itoh Japan 8 268 0.9× 89 2.6× 22 0.6× 57 3.2× 13 1.3× 29 294
M. Sorna United States 10 375 1.2× 54 1.6× 72 2.1× 19 1.1× 18 1.8× 20 385
R. Mahnkopf Germany 7 284 0.9× 65 1.9× 37 1.1× 5 0.3× 12 1.2× 17 290
Josef Watts United States 11 330 1.1× 43 1.3× 37 1.1× 5 0.3× 11 1.1× 28 345
Tomoaki Yabe Japan 11 320 1.1× 79 2.3× 44 1.3× 18 1.0× 5 0.5× 23 330

Countries citing papers authored by R. Hori

Since Specialization
Citations

This map shows the geographic impact of R. Hori's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by R. Hori with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites R. Hori more than expected).

Fields of papers citing papers by R. Hori

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by R. Hori. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by R. Hori. The network helps show where R. Hori may publish in the future.

Co-authorship network of co-authors of R. Hori

This figure shows the co-authorship network connecting the top 25 collaborators of R. Hori. A scholar is included among the top collaborators of R. Hori based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with R. Hori. R. Hori is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Yamazaki, Takayuki, Hiroshi Sato, S. Kubono, et al.. (2002). A 3.3 V high-density AND flash memory with 1 ms/512B erase and program time. 124–125,. 10 indexed citations
2.
Asai, Kanichi, Hirohisa Kawahara, Takanobu Toriyama, et al.. (1993). Hemodialysis and the elderly patient: Retrospective analysis of morbidity and mortality. 3(3). 139–144. 3 indexed citations
3.
Hori, R., et al.. (1991). Recent DRAM technology. 40(1). 7–16. 1 indexed citations
4.
Kobayashi, Y., et al.. (1989). Bipolar CMOS-merged technology for a high-speed 1-Mbit DRAM. IEEE Transactions on Electron Devices. 36(4). 706–711. 6 indexed citations
5.
Kitsukawa, G., K. Itoh, R. Hori, et al.. (1989). A 1-Mbit BiCMOS DRAM using temperature-compensation circuit techniques. IEEE Journal of Solid-State Circuits. 24(3). 597–602. 16 indexed citations
6.
Kawahara, T., G. Kitsukawa, Hiroyoshi Higuchi, et al.. (1989). Substrate current reduction techniques for BiCMOS DRAM. IEEE Journal of Solid-State Circuits. 24(5). 1381–1389. 3 indexed citations
7.
Kitsukawa, G., Kiyoo Itoh, R. Hori, et al.. (1988). A 1-Mbit BiCMOS DRAM using Temperature Compensation Circuit Techniques. 2–5. 1 indexed citations
8.
Kitsukawa, G., R. Hori, Y. Kawajiri, et al.. (1987). An experimental 1-Mbit BiCMOS DRAM. IEEE Journal of Solid-State Circuits. 22(5). 657–662. 22 indexed citations
9.
Hori, R., G. Kitsukawa, Y. Kawajiri, et al.. (1987). An experimental 35ns 1Mb biCMOS DRAM. 280–281. 7 indexed citations
10.
Kobayashi, Yutaka, et al.. (1986). Bipolar CMOS merged structure for high speed M bit DRAM. 802–804. 10 indexed citations
11.
Kimura, K., K. Itoh, R. Hori, et al.. (1986). Power Reduction Techniques in Megabit DRAM's. IEEE Journal of Solid-State Circuits. 21(3). 381–389. 24 indexed citations
12.
Itoh, Kiyoo, et al.. (1985). Experimental 1 Mbit DRAM using power reduction techniques. IEE Proceedings I Solid State and Electron Devices. 132(1). 23–23. 1 indexed citations
13.
Masuda, H., R. Hori, Y. Kamigaki, & K. Itoh. (1980). Single 5-V, 64k RAM with Scaled-Down MOS Structure. IEEE Journal of Solid-State Circuits. 15(4). 672–677. 5 indexed citations
14.
Itoh, K., R. Hori, H. Masuda, et al.. (1980). A single 5V 64K dynamic RAM. 228–229. 25 indexed citations
15.
Masuda, H., R. Hori, Y. Kamigaki, et al.. (1980). A 5 V-only 64K dynamic RAM based on high S/N design. IEEE Journal of Solid-State Circuits. 15(5). 846–854. 44 indexed citations
16.
Minato, O., et al.. (1978). High Performance 4k Dynamic RAM Fabricated with Short Channel MOS Technology. Japanese Journal of Applied Physics. 17(S1). 65–65. 1 indexed citations
17.
Nishimatsu, Shigeru, et al.. (1977). Grooved Gate MOSFET. Japanese Journal of Applied Physics. 16(S1). 179–179. 16 indexed citations
18.
Sakai, Yoshio, et al.. (1977). A New Isolation Technique for SOS/LSI's–Local Buried Oxide Isolation of SOS (LOBOS)–. Japanese Journal of Applied Physics. 16(S1). 551–551. 2 indexed citations
19.
Nishimatsu, Shigeru, Y. Kawamoto, H. Masuda, R. Hori, & O. Minato. (1976). Grooved Gate MOSFET. 2 indexed citations
20.
Kubo, M., et al.. (1976). A threshold voltage controlling circuit for short channel MOS integrated circuits. 54–55. 13 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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