G. Kitsukawa

425 total citations
22 papers, 297 citations indexed

About

G. Kitsukawa is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Computer Networks and Communications. According to data from OpenAlex, G. Kitsukawa has authored 22 papers receiving a total of 297 indexed citations (citations by other indexed papers that have themselves been cited), including 22 papers in Electrical and Electronic Engineering, 3 papers in Biomedical Engineering and 1 paper in Computer Networks and Communications. Recurrent topics in G. Kitsukawa's work include Low-power high-performance VLSI design (20 papers), Advancements in Semiconductor Devices and Circuit Design (18 papers) and Semiconductor materials and devices (18 papers). G. Kitsukawa is often cited by papers focused on Low-power high-performance VLSI design (20 papers), Advancements in Semiconductor Devices and Circuit Design (18 papers) and Semiconductor materials and devices (18 papers). G. Kitsukawa collaborates with scholars based in Japan and United Kingdom. G. Kitsukawa's co-authors include Y. Kawajiri, T. Kawahara, Masakazu Aoki, K. Itoh, T. Kure, Masashi Horiguchi, R. Hori, Y. Kobayashi, Takao Watanabe and Hiroyoshi Higuchi and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Electron Devices and European Solid-State Circuits Conference.

In The Last Decade

G. Kitsukawa

22 papers receiving 281 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name	h						Papers	Cites
G. Kitsukawa Japan	11	288	50	50	23	7	22	297
T. Sakata Japan	9	272 0.9×	44 0.9×	48 1.0×	20 0.9×	12 1.7×	28	293
J. Etoh Japan	10	307 1.1×	40 0.8×	71 1.4×	26 1.1×	11 1.6×	25	333
M. Sorna United States	10	375 1.3×	54 1.1×	72 1.4×	19 0.8×	18 2.6×	20	385
R. Hori Japan	11	301 1.0×	34 0.7×	34 0.7×	18 0.8×	10 1.4×	28	309
Stéphane Donnay Belgium	8	311 1.1×	49 1.0×	68 1.4×	17 0.7×	2 0.3×	18	322
D. Hoyniak United States	7	262 0.9×	63 1.3×	19 0.4×	26 1.1×	9 1.3×	8	282
S.H. Jen United States	9	389 1.4×	23 0.5×	93 1.9×	26 1.1×	5 0.7×	16	402
J. Berthold Germany	12	430 1.5×	116 2.3×	88 1.8×	13 0.6×	8 1.1×	32	443
Martin Saint-Laurent United States	9	316 1.1×	99 2.0×	96 1.9×	55 2.4×	3 0.4×	20	331
D. Overhauser United States	10	289 1.0×	119 2.4×	28 0.6×	7 0.3×	4 0.6×	20	304

Countries citing papers authored by G. Kitsukawa

Since Specialization

Citations

This map shows the geographic impact of G. Kitsukawa's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by G. Kitsukawa with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites G. Kitsukawa more than expected).

Fields of papers citing papers by G. Kitsukawa

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by G. Kitsukawa. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by G. Kitsukawa. The network helps show where G. Kitsukawa may publish in the future.

Co-authorship network of co-authors of G. Kitsukawa

This figure shows the co-authorship network connecting the top 25 collaborators of G. Kitsukawa. A scholar is included among the top collaborators of G. Kitsukawa based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with G. Kitsukawa. G. Kitsukawa is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

Nakamura, M., et al.. (2002). A 29 ns 64 Mb DRAM with hierarchical array architecture. 246–247. 3 indexed citations

Nakamura, M., Tsuyoshi Takahashi, G. Kitsukawa, et al.. (1996). A 29-ns 64-Mb DRAM with hierarchical array architecture. IEEE Journal of Solid-State Circuits. 31(9). 1302–1307. 29 indexed citations

Kawahara, T., Y. Kawajiri, Masashi Horiguchi, et al.. (1994). A charge recycle refresh for Gb-scale DRAM's in file applications. IEEE Journal of Solid-State Circuits. 29(6). 715–722. 10 indexed citations

Kitsukawa, G., Masashi Horiguchi, T. Kawahara, et al.. (1993). 256 Mb DRAM technologies for file applications. 48–49. 22 indexed citations

Kawahara, T., T. Sakata, K. Itoh, et al.. (1993). A high-speed, small-area, threshold-voltage-mismatch compensation sense amplifier for gigabit-scale DRAM arrays. IEEE Journal of Solid-State Circuits. 28(7). 816–823. 18 indexed citations

Kawahara, T., Masashi Horiguchi, Y. Kawajiri, et al.. (1993). Subthreshold current reduction for decoded-driver by self-reverse biasing (DRAMs). IEEE Journal of Solid-State Circuits. 28(11). 1136–1144. 51 indexed citations

Kitsukawa, G., Masashi Horiguchi, Y. Kawajiri, et al.. (1993). 256-Mb DRAM circuit technologies for file applications. IEEE Journal of Solid-State Circuits. 28(11). 1105–1113. 24 indexed citations

Kawahara, T., et al.. (1992). Deep-submicrometer BiCMOS circuit technology for sub-10-ns ECL 4-Mb DRAM's. IEEE Journal of Solid-State Circuits. 27(4). 589–596. 2 indexed citations

Kawahara, T., et al.. (1991). Deep Sub-Micron BICMOS Circuit Technology for Sub-10 ns ECL 4-Mb DRAMs. European Solid-State Circuits Conference. 1. 29–32. 2 indexed citations

10.

Kawahara, T., Y. Kawajiri, G. Kitsukawa, et al.. (1991). A circuit technology for sub-10-ns ECL 4-Mb BiCMOS DRAM's. IEEE Journal of Solid-State Circuits. 26(11). 1530–1537. 13 indexed citations

11.

Kitsukawa, G., Kazumasa Yanagisawa, Y. Kobayashi, et al.. (1990). A 23-ns 1-Mb BiCMOS DRAM. IEEE Journal of Solid-State Circuits. 25(5). 1102–1111. 32 indexed citations

12.

Yanagisawa, Kazumasa, et al.. (1989). A 23ns 1Mbit BiCMOS DRAM. sc 24. 184–187. 4 indexed citations

13.

Kobayashi, Y., et al.. (1989). Bipolar CMOS-merged technology for a high-speed 1-Mbit DRAM. IEEE Transactions on Electron Devices. 36(4). 706–711. 6 indexed citations

14.

Kitsukawa, G., K. Itoh, R. Hori, et al.. (1989). A 1-Mbit BiCMOS DRAM using temperature-compensation circuit techniques. IEEE Journal of Solid-State Circuits. 24(3). 597–602. 16 indexed citations

15.

Kawahara, T., G. Kitsukawa, Hiroyoshi Higuchi, et al.. (1989). Substrate current reduction techniques for BiCMOS DRAM. IEEE Journal of Solid-State Circuits. 24(5). 1381–1389. 3 indexed citations

16.

Kitsukawa, G., Kiyoo Itoh, R. Hori, et al.. (1988). A 1-Mbit BiCMOS DRAM using Temperature Compensation Circuit Techniques. 2–5. 1 indexed citations

17.

Kitsukawa, G., R. Hori, Y. Kawajiri, et al.. (1987). An experimental 1-Mbit BiCMOS DRAM. IEEE Journal of Solid-State Circuits. 22(5). 657–662. 22 indexed citations

18.

Hori, R., G. Kitsukawa, Y. Kawajiri, et al.. (1987). An experimental 35ns 1Mb biCMOS DRAM. 280–281. 7 indexed citations

19.

Higuchi, Hiroyoshi, G. Kitsukawa, Tatsuhiko N. Ikeda, et al.. (1984). Performance and structures of scaled-down bipolar devices merged with CMOSFETs. 694–697. 19 indexed citations

20.

Ogiue, K., et al.. (1982). Logic-in-memory VLSI for mainframe computers. 180–181. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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