Marcello Traiola
- Hardware and Architecture top 5%
- VLSI and Analog Circuit Testing 8
- Parallel Computing and Optimization Techniques 6
-
- Low-power high-performance VLSI design 21
- Advancements in Semiconductor Devices and Circuit Design 13
- Radiation Effects in Electronics 11
- Advanced Memory and Neural Computing 6
- Semiconductor materials and devices 6
- VLSI and FPGA Design Techniques 5
In The Last Decade
Marcello Traiola
35 papers receiving 302 citations
Peers
Comparison fields: 5 of 32
- Hardware and Architecture 112
- Electrical and Electronic Engineering 260
- Software 17
- Artificial Intelligence 65
- Computer Vision and Pattern Recognition 22
Countries citing papers authored by Marcello Traiola
This map shows the geographic impact of Marcello Traiola's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Marcello Traiola with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Marcello Traiola more than expected).
Fields of papers citing papers by Marcello Traiola
This network shows the impact of papers produced by Marcello Traiola. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Marcello Traiola. The network helps show where Marcello Traiola may publish in the future.
Co-authorship network
The 25 scholars most cited alongside Marcello Traiola, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.
All Works
| # | Work | ||
|---|---|---|---|
| 1 | 2024 | 6 | |
| 2 | 2024 | 8 | |
| 3 | 2024 | 0 | |
| 4 | 2024 | 0 | |
| 5 | 2023 | 23 | |
| 6 | 2023 | 1 | |
| 7 | 2023 | 7 | |
| 8 | 2023 | 6 | |
| 9 | 2023 | 5 | |
| 10 | 2021 | 5 | |
| 11 | 2021 | 15 | |
| 12 | 2021 | 6 | |
| 13 | 2020 | 15 | |
| 14 | 2020 | 8 | |
| 15 | 2020 | 6 | |
| 16 | 2019 | 11 | |
| 17 | 2018 | 7 | |
| 18 | Can we Approximate the Test of Integrated Circuits? | 2017 | 7 |
| 19 | 2017 | 4 | |
| 20 | 2017 | 11 |
About Marcello Traiola
Marcello Traiola is a scholar working on Hardware and Architecture, Software, Electrical and Electronic Engineering, Safety, Risk, Reliability and Quality and Artificial Intelligence, having authored 39 papers that have together received 307 indexed citations. Recurring topics across this work include Low-power high-performance VLSI design (21 papers), Advancements in Semiconductor Devices and Circuit Design (13 papers), Radiation Effects in Electronics (11 papers), VLSI and Analog Circuit Testing (8 papers), Advanced Memory and Neural Computing (6 papers), Parallel Computing and Optimization Techniques (6 papers), Semiconductor materials and devices (6 papers) and VLSI and FPGA Design Techniques (5 papers). The work is most often cited by research in Hardware and Architecture (112 citations), Electrical and Electronic Engineering (260 citations), Software (17 citations), Artificial Intelligence (65 citations) and Computer Vision and Pattern Recognition (22 citations). Marcello Traiola has collaborated with scholars based in France, Italy and Germany. Frequent co-authors include Alberto Bosio, Mario Barbareschi, A. Virazel, Patrick Girard, Ernesto Sánchez, Annachiara Ruospo, Ian O’Connor, Angeliki Kritikakou, Olivier Sentieys and Salvatore Barone. Their work appears in journals such as IEEE Access, Microelectronics Reliability, Computer, ACM Journal on Emerging Technologies in Computing Systems and Proceedings of the IEEE.
Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.