Xiaolang Yan

419 total citations
35 papers, 268 citations indexed

About

Xiaolang Yan is a scholar working on Computer Networks and Communications, Hardware and Architecture and Electrical and Electronic Engineering. According to data from OpenAlex, Xiaolang Yan has authored 35 papers receiving a total of 268 indexed citations (citations by other indexed papers that have themselves been cited), including 18 papers in Computer Networks and Communications, 18 papers in Hardware and Architecture and 13 papers in Electrical and Electronic Engineering. Recurrent topics in Xiaolang Yan's work include Parallel Computing and Optimization Techniques (15 papers), Interconnection Networks and Systems (13 papers) and Embedded Systems Design Techniques (11 papers). Xiaolang Yan is often cited by papers focused on Parallel Computing and Optimization Techniques (15 papers), Interconnection Networks and Systems (13 papers) and Embedded Systems Design Techniques (11 papers). Xiaolang Yan collaborates with scholars based in China, Sweden and France. Xiaolang Yan's co-authors include Kai Huang, Qiang Chen, Xiaomeng Zhang, Rongjie Yan, Zhonghai Lu, Lirong Zheng, Lisane Brisolara, Zhi Zhang, Luigi Carro and Ahmed Jerraya and has published in prestigious journals such as IEEE Access, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems and Electronics.

In The Last Decade

Xiaolang Yan

34 papers receiving 250 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Xiaolang Yan China 10 164 146 98 34 27 35 268
Ron Sass United States 11 365 2.2× 298 2.0× 132 1.3× 18 0.5× 30 1.1× 63 456
E. Nett Germany 10 154 0.9× 309 2.1× 64 0.7× 20 0.6× 20 0.7× 43 377
Nathan Pemberton United States 6 235 1.4× 146 1.0× 135 1.4× 33 1.0× 78 2.9× 7 363
Paul Rigge United States 7 129 0.8× 155 1.1× 183 1.9× 12 0.4× 55 2.0× 13 336
Umair Ullah Tariq Australia 11 154 0.9× 262 1.8× 96 1.0× 69 2.0× 34 1.3× 26 340
Daniel A. Prener United States 5 262 1.6× 225 1.5× 109 1.1× 27 0.8× 35 1.3× 9 356
Alexander G. Dean United States 11 210 1.3× 243 1.7× 64 0.7× 23 0.7× 56 2.1× 43 427
Zhaoshi Li China 8 187 1.1× 152 1.0× 86 0.9× 19 0.6× 45 1.7× 19 286
Federico Terraneo Italy 10 93 0.6× 135 0.9× 85 0.9× 24 0.7× 28 1.0× 42 243
Bardia Safaei Iran 11 45 0.3× 327 2.2× 155 1.6× 49 1.4× 28 1.0× 38 433

Countries citing papers authored by Xiaolang Yan

Since Specialization
Citations

This map shows the geographic impact of Xiaolang Yan's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Xiaolang Yan with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Xiaolang Yan more than expected).

Fields of papers citing papers by Xiaolang Yan

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Xiaolang Yan. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Xiaolang Yan. The network helps show where Xiaolang Yan may publish in the future.

Co-authorship network of co-authors of Xiaolang Yan

This figure shows the co-authorship network connecting the top 25 collaborators of Xiaolang Yan. A scholar is included among the top collaborators of Xiaolang Yan based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Xiaolang Yan. Xiaolang Yan is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
He, Lenian, et al.. (2023). A Hardware Non-Invasive Mapping Method for Condition Bits in Binary Translation. Electronics. 12(14). 3014–3014. 1 indexed citations
2.
Liu, Dongqi, Jiahui Luo, Zhijian Chen, et al.. (2020). Xuantie-910: A Commercial Multi-Core 12-Stage Pipeline Out-of-Order 64-bit High Performance RISC-V Processor with Vector Extension : Industrial Product. Rare & Special e-Zone (The Hong Kong University of Science and Technology). 52–64. 60 indexed citations
3.
Liu, Dongqi, Jiahui Luo, Yu Pu, et al.. (2020). Xuantie-910: Innovating Cloud and Edge Computing by RISC-V. 9 indexed citations
4.
Huang, Kai, et al.. (2018). Energy-Efficient Scheduling of Periodic Applications on Safety-Critical Time-Triggered Multiprocessor Systems. Electronics. 7(6). 98–98. 2 indexed citations
5.
Huang, Kai, et al.. (2018). Expected Energy Optimization for Real-Time Multiprocessor SoCs Running Periodic Tasks with Uncertain Execution Time. IEEE Transactions on Sustainable Computing. 6(3). 398–411. 9 indexed citations
6.
Huang, Kai, et al.. (2018). Access Adaptive and Thread-Aware Cache Partitioning in Multicore Systems. Electronics. 7(9). 172–172. 2 indexed citations
7.
Huang, Kai, et al.. (2018). Energy-Efficient Fault-Tolerant Mapping and Scheduling on Heterogeneous Multiprocessor Real-Time Systems. IEEE Access. 6. 57614–57630. 23 indexed citations
8.
Huang, Kai, Xiaomeng Zhang, Min Yu, et al.. (2018). A Scalable and Adaptable ILP-Based Approach for Task Mapping on MPSoC Considering Load Balance and Communication Optimization. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 38(9). 1744–1757. 11 indexed citations
9.
Yan, Xiaolang, et al.. (2015). Memory Coherency Based CPU-Cache-FPGA Acceleration Architecture for Cloud Computing. 21. 304–307. 3 indexed citations
10.
Huang, Kai, Min Yu, Xiaomeng Zhang, et al.. (2015). Software Pipeline–Based Partitioning Method with Trade-Off between Workload Balance and Communication Optimization. ETRI Journal. 37(3). 562–572. 6 indexed citations
11.
Lu, Zhonghai, et al.. (2014). Analysis and evaluation of per-flow delay bound for multiplexing models. Design, Automation, and Test in Europe. 251. 2 indexed citations
12.
Zhu, Jiaojiao, et al.. (2014). An improved shape shifting method of critical area extraction. Journal of Semiconductors. 35(2). 26006–26006. 1 indexed citations
13.
Zhu, Jiaojiao, et al.. (2012). Scratch-concerned yield modeling for IC manufacturing involved with a chemical mechanical polishing process. Journal of Zhejiang University SCIENCE C. 13(5). 376–384. 4 indexed citations
14.
Ren, Jie, Weiwei Pan, Yongjun Zheng, Zheng Shi, & Xiaolang Yan. (2012). Array based HV/VH tree: an effective data structure for layout representation. Journal of Zhejiang University SCIENCE C. 13(3). 232–237. 3 indexed citations
15.
Pan, Yun, et al.. (2011). An Improved Color-based Particle Filter and Its Full Hardware Implementation. JOURNAL OF ELECTRONICS INFORMATION TECHNOLOGY. 33(2). 448–454. 1 indexed citations
16.
Yan, Xiaolang, et al.. (2010). Fast FEC synchronization for 10G Ethernet receiver. 2082–2084.
17.
Zhang, Zhi, et al.. (2009). Wireless sensor networks for logistics and retail. Lund University Publications (Lund University). 124. 1–4. 13 indexed citations
18.
Chae, Soo‐Ik, Lisane Brisolara, Luigi Carro, et al.. (2008). Simulink®-based heterogeneous multiprocessor SoC design flow for mixed hardware/software refinement and simulation. Integration. 42(2). 227–245. 14 indexed citations
19.
Huang, Kai, et al.. (2007). Simulink-based MPSoC design flow. Proceedings - ACM IEEE Design Automation Conference. 39–39. 31 indexed citations
20.
Yan, Xiaolang, et al.. (2004). A front-end automation tool supporting design, verification and reuse of SOC. Journal of Zhejiang University. Science A. 5(9). 1102–1105. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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