Albert Magyar

576 total citations
8 papers, 373 citations indexed

About

Albert Magyar is a scholar working on Hardware and Architecture, Electrical and Electronic Engineering and Computer Networks and Communications. According to data from OpenAlex, Albert Magyar has authored 8 papers receiving a total of 373 indexed citations (citations by other indexed papers that have themselves been cited), including 8 papers in Hardware and Architecture, 3 papers in Electrical and Electronic Engineering and 1 paper in Computer Networks and Communications. Recurrent topics in Albert Magyar's work include Parallel Computing and Optimization Techniques (7 papers), Embedded Systems Design Techniques (7 papers) and VLSI and Analog Circuit Testing (2 papers). Albert Magyar is often cited by papers focused on Parallel Computing and Optimization Techniques (7 papers), Embedded Systems Design Techniques (7 papers) and VLSI and Analog Circuit Testing (2 papers). Albert Magyar collaborates with scholars based in United States. Albert Magyar's co-authors include Colin Schmidt, Jonathan Bachrach, David Biancolin, Jack Koenig, Jim Lawson, Donggyu Kim, Richard J. Lin, Patrick Li, Krste Asanović and Sagar Karandikar and has published in prestigious journals such as IEEE Micro, IEEE Solid-State Circuits Letters and eScholarship (California Digital Library).

In The Last Decade

Albert Magyar

7 papers receiving 363 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Albert Magyar United States 6 255 167 100 70 28 8 373
David Biancolin United States 8 287 1.1× 175 1.0× 166 1.7× 89 1.3× 27 1.0× 13 430
Sunil Shukla United States 10 263 1.0× 182 1.1× 205 2.0× 73 1.0× 28 1.0× 41 447
Tim Todman United Kingdom 8 314 1.2× 163 1.0× 187 1.9× 58 0.8× 44 1.6× 39 414
Anees Ullah Pakistan 13 175 0.7× 239 1.4× 99 1.0× 60 0.9× 30 1.1× 43 357
Sied Mehdi Fakhraie Iran 13 157 0.6× 375 2.2× 120 1.2× 119 1.7× 36 1.3× 61 541
Vidyasagar Nookala United States 7 225 0.9× 321 1.9× 128 1.3× 27 0.4× 44 1.6× 9 460
Nathan Pemberton United States 6 235 0.9× 135 0.8× 146 1.5× 78 1.1× 13 0.5× 7 363
Peeter Ellervee Estonia 10 367 1.4× 216 1.3× 227 2.3× 29 0.4× 27 1.0× 94 474
Mohammad Ali Ghodrat United States 10 333 1.3× 131 0.8× 260 2.6× 41 0.6× 18 0.6× 22 425
Kuan-Hsun Chen Germany 11 286 1.1× 110 0.7× 193 1.9× 56 0.8× 83 3.0× 66 426

Countries citing papers authored by Albert Magyar

Since Specialization
Citations

This map shows the geographic impact of Albert Magyar's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Albert Magyar with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Albert Magyar more than expected).

Fields of papers citing papers by Albert Magyar

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Albert Magyar. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Albert Magyar. The network helps show where Albert Magyar may publish in the future.

Co-authorship network of co-authors of Albert Magyar

This figure shows the co-authorship network connecting the top 25 collaborators of Albert Magyar. A scholar is included among the top collaborators of Albert Magyar based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Albert Magyar. Albert Magyar is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

8 of 8 papers shown
1.
Biancolin, David, Albert Magyar, Sagar Karandikar, et al.. (2021). Accessible, FPGA Resource-Optimized Simulation of Multiclock Systems in FireSim. IEEE Micro. 41(4). 58–66. 2 indexed citations
2.
Amid, Alon, David Biancolin, Sagar Karandikar, et al.. (2020). Invited: Chipyard - An Integrated SoC Research and Implementation Environment. 1–6. 5 indexed citations
3.
Amid, Alon, David Biancolin, Sagar Karandikar, et al.. (2020). Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs. IEEE Micro. 40(4). 10–21. 193 indexed citations
4.
Magyar, Albert, et al.. (2019). Golden Gate: Bridging The Resource-Efficiency Gap Between ASICs and FPGA Prototypes. eScholarship (California Digital Library). 1–8. 9 indexed citations
5.
Truesdell, Daniel S., et al.. (2019). A 6–140-nW 11 Hz–8.2-kHz DVFS RISC-V Microprocessor Using Scalable Dynamic Leakage-Suppression Logic. IEEE Solid-State Circuits Letters. 2(8). 57–60. 24 indexed citations
6.
Koenig, Jack, Patrick Li, Richard J. Lin, et al.. (2017). Reusability is FIRRTL ground: hardware construction languages, compiler frameworks, and transformations. International Conference on Computer Aided Design. 209–216. 42 indexed citations
7.
Koenig, Jack, Patrick Li, Richard J. Lin, et al.. (2017). Reusability is FIRRTL ground: Hardware construction languages, compiler frameworks, and transformations. 209–216. 98 indexed citations
8.
Bachrach, Jonathan, et al.. (2017). Cyclist: Accelerating hardware development. 1011–1018.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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