Taeho Seong

647 citations

26 papers · 484 indexed · h-index 15

Co-authors: Jaehyouk Choi Yongsun Lee Hangi Park Seyeon Yoo Younghyun Lim Juyeop Kim Heein Yoon Mina Kim
Topics: Advancements in PLL and VCO Technologies (25 papers)Radio Frequency Integrated Circuit Design (22 papers)Analog and Mixed-Signal Circuit Design (13 papers)
Cited by: Electrical and Electronic Engineering Biomedical Engineering Hardware and Architecture
Journals: Nano Energy IEEE Journal of Solid-State Circuits IEEE Transactions on Circuits and Systems I Regular Papers
Partner nations: South Korea United States

In The Last Decade

Taeho Seong

24 papers receiving 476 citations

Peers

Countries citing papers authored by Taeho Seong

Since Specialization

Citations

This map shows the geographic impact of Taeho Seong's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Taeho Seong with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Taeho Seong more than expected).

Fields of papers citing papers by Taeho Seong

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Taeho Seong. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Taeho Seong. The network helps show where Taeho Seong may publish in the future.

Co-authorship network of co-authors of Taeho Seong

This figure shows the co-authorship network connecting the top 25 collaborators of Taeho Seong. A scholar is included among the top collaborators of Taeho Seong based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Taeho Seong. Taeho Seong is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

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20 of 20 papers shown

#	Work	Indexed citations
1	A Low-Jitter Ring-DCO-Based Fractional-N Digital PLL With a 1/8 DTC-Range-Reduction Technique Using a Quadruple-Timing-Margin Phase Selector 2022 ·IEEE Journal of Solid-State Circuits ·Hangi Park,(unknown),Taeho Seong,Jaehyouk Choi	18
2	A Low-Jitter and Low-Fractional-Spur Ring-DCO-Based Fractional-N Digital PLL Using a DTC’s Second-/Third-Order Nonlinearity Cancellation and a Probability-Density-Shaping ΔΣM 2022 ·IEEE Journal of Solid-State Circuits ·(unknown),Hangi Park,Yongsun Lee,Taeho Seong,Jaehyouk Choi	34
3	A 188fs_rms-Jitter and −243d8-FoM_jitter 5.2GHz-Ring-DCO-Based Fractional-N Digital PLL with a 1/8 DTC-Range-Reduction Technique Using a Quadruple-Timing-Margin Phase Selector 2022 ·2022 IEEE International Solid- State Circuits Conference (ISSCC) ·(unknown),Hangi Park,Taeho Seong,Jaehyouk Choi	16
4	32.4 A 104fs_rms-Jitter and -61dBc-Fractional Spur 15GHz Fractional-N Subsampling PLL Using a Voltage-Domain Quantization-Error Cancelation Technique 2021 ·Scholarworks@UNIST (Ulsan National Institute of Science and Technology) ·Juyeop Kim,Yongwoo Jo,Younghyun Lim,Taeho Seong,Hangi Park,Seyeon Yoo,Yongsun Lee,(unknown),Jaehyouk Choi	24
5	A Low-Jitter and Low-Reference-Spur Ring-VCO- Based Injection-Locked Clock Multiplier Using a Triple-Point Background Calibrator 2020 ·IEEE Journal of Solid-State Circuits ·Seyeon Yoo,(unknown),Yongsun Lee,Taeho Seong,Younghyun Lim,Jaehyouk Choi	16
6	17.1 A −240dB-FoM_jitter and −115dBc/Hz PN @ 100kHz, 7.7GHz Ring-DCO-Based Digital PLL Using P/I-Gain Co-Optimization and Sequence-Rearranged Optimally Spaced TDC for Flicker-Noise Reduction 2020 ·Yongsun Lee,Taeho Seong,(unknown),(unknown),Hangi Park,Jaehyouk Choi	13
7	17.3 A −58dBc-Worst-Fractional-Spur and −234dB-FoM_jitter, 5.5GHz Ring-DCO-Based Fractional-N DPLL Using a Time-Invariant-Probability Modulator, Generating a Nonlinearity-Robust DTC-Control Word 2020 ·Scholarworks@UNIST (Ulsan National Institute of Science and Technology) ·Taeho Seong,Yongsun Lee,(unknown),(unknown),Hangi Park,Kyuho Lee,Jaehyouk Choi	36
8	A Fast-Transient and High-Accuracy, Adaptive-Sampling Digital LDO Using a Single-VCO-Based Edge-Racing Time Quantizer 2019 ·IEEE Solid-State Circuits Letters ·(unknown),(unknown),Younghyun Lim,Seyeon Yoo,Yongsun Lee,Taeho Seong,Jaehyouk Choi	12
9	A 0.1–1.5-GHz Wide Harmonic-Locking-Free Delay-Locked Loop Using an Exponential DAC 2019 ·IEEE Microwave and Wireless Components Letters ·(unknown),Juyeop Kim,(unknown),Hangi Park,Seyeon Yoo,Taeho Seong,Jaehyouk Choi	5
10	An Ultra-Low-Jitter, mmW-Band Frequency Synthesizer Based on Digital Subsampling PLL Using Optimally Spaced Voltage Comparators 2019 ·IEEE Journal of Solid-State Circuits ·Juyeop Kim,Younghyun Lim,Heein Yoon,Yongsun Lee,Hangi Park,(unknown),Taeho Seong,Jaehyouk Choi	36
11	16.2 A 76fs<inf>rms</inf> Jitter and –40dBc Integrated-Phase-Noise 28-to-31GHz Frequency Synthesizer Based on Digital Sub-Sampling PLL Using Optimally Spaced Voltage Comparators and Background Loop-Gain Optimization 2019 ·Scholarworks@UNIST (Ulsan National Institute of Science and Technology) ·Juyeop Kim,Heein Yoon,Younghyun Lim,Yongsun Lee,(unknown),Taeho Seong,Jaehyouk Choi	49
12	A switched-loop-filter PLL with fast phase-error correction technique 2018 ·Asia and South Pacific Design Automation Conference ·Yongsun Lee,Taeho Seong,Seyeon Yoo,Jaehyouk Choi	0
13	A −242dB FOM and −75dBc-reference-spur ring-DCO-based all-digital PLL using a fast phase-error correction technique and a low-power optimal-threshold TDC 2018 ·Scholarworks@UNIST (Ulsan National Institute of Science and Technology) ·Taeho Seong,Yongsun Lee,Seyeon Yoo,Jaehyouk Choi	16
14	A switched-loop-filter PLL with fast phase-error correction technique 2018 ·Scholarworks@UNIST (Ulsan National Institute of Science and Technology) ·Yongsun Lee,Taeho Seong,Seyeon Yoo,Jaehyouk Choi	0
15	A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop Filter PLL Using a Fast Phase-Error Correction Technique 2017 ·IEEE Journal of Solid-State Circuits ·Yongsun Lee,Taeho Seong,Seyeon Yoo,Jaehyouk Choi	41
16	A −242-dB FOM and −71-dBc reference spur ring-VCO-based ultra-low-jitter switched-loop-filter PLL using a fast phase-error correction technique 2017 ·Scholarworks@UNIST (Ulsan National Institute of Science and Technology) ·Taeho Seong,Yongsun Lee,Seyeon Yoo,Jaehyouk Choi	10
17	An Ultra-Low Power and Compact $LC$-Tank-Based Frequency Tripler Using Pulsed Input Signals 2016 ·IEEE Microwave and Wireless Components Letters ·Seyeon Yoo,(unknown),Taeho Seong,Jaehyouk Choi	2
18	Analysis and Design of a Core-Size-Scalable Low Phase Noise <formula formulatype="inline"><tex Notation="TeX">$LC$</tex> </formula>-VCO for Multi-Standard Cellular Transceivers 2015 ·IEEE Transactions on Circuits and Systems I Regular Papers ·Taeho Seong,Jae Joon Kim,Jaehyouk Choi	4
19	A Low Phase Noise Injection-Locked Programmable Reference Clock Multiplier With a Two-Phase PVT-Calibrator for $\Delta\Sigma$ PLLs 2014 ·IEEE Transactions on Circuits and Systems I Regular Papers ·Yongsun Lee,Mina Kim,Taeho Seong,Jaehyouk Choi	18
20	Ultralow In-Band Phase Noise Injection-Locked Frequency Multiplier Design Based on Open-Loop Frequency Calibration 2014 ·IEEE Transactions on Circuits & Systems II Express Briefs ·Taeho Seong,Yongsun Lee,Jaehyouk Choi	6

About Taeho Seong

Taeho Seong is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Astronomy and Astrophysics, having authored 26 papers that have together received 484 indexed citations. Recurring topics across this work include Advancements in PLL and VCO Technologies (25 papers), Radio Frequency Integrated Circuit Design (22 papers) and Analog and Mixed-Signal Circuit Design (13 papers). The work is most often cited by research in Electrical and Electronic Engineering (467 citations), Biomedical Engineering (175 citations) and Hardware and Architecture (13 citations). Taeho Seong has collaborated with scholars based in South Korea and United States. Frequent co-authors include Jaehyouk Choi, Yongsun Lee, Hangi Park, Seyeon Yoo, Younghyun Lim, Juyeop Kim, Heein Yoon, Mina Kim, Yongwoo Jo and Kyuho Lee. Their work appears in journals such as Nano Energy, IEEE Journal of Solid-State Circuits and IEEE Transactions on Circuits and Systems I Regular Papers.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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