Heein Yoon

411 total citations
17 papers, 316 citations indexed

About

Heein Yoon is a scholar working on Electrical and Electronic Engineering, Biomedical Engineering and Artificial Intelligence. According to data from OpenAlex, Heein Yoon has authored 17 papers receiving a total of 316 indexed citations (citations by other indexed papers that have themselves been cited), including 17 papers in Electrical and Electronic Engineering, 5 papers in Biomedical Engineering and 1 paper in Artificial Intelligence. Recurrent topics in Heein Yoon's work include Advancements in PLL and VCO Technologies (15 papers), Radio Frequency Integrated Circuit Design (14 papers) and Analog and Mixed-Signal Circuit Design (4 papers). Heein Yoon is often cited by papers focused on Advancements in PLL and VCO Technologies (15 papers), Radio Frequency Integrated Circuit Design (14 papers) and Analog and Mixed-Signal Circuit Design (4 papers). Heein Yoon collaborates with scholars based in South Korea and United States. Heein Yoon's co-authors include Jaehyouk Choi, Yongsun Lee, Juyeop Kim, Younghyun Lim, Seyeon Yoo, Taeho Seong, Jae Joon Kim, Hangi Park, Yo-Chuol Ho and Hong-Teuk Kim and has published in prestigious journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Circuits and Systems I Regular Papers and IEEE Transactions on Circuits & Systems II Express Briefs.

In The Last Decade

Heein Yoon

15 papers receiving 307 citations

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Heein Yoon South Korea 10 315 72 9 5 5 17 316
T.A. Karatsori France 10 246 0.8× 44 0.6× 14 1.6× 4 0.8× 3 0.6× 23 253
Makihiko Katsuragi Japan 5 245 0.8× 59 0.8× 9 1.0× 5 1.0× 2 0.4× 9 247
Chang-Tsung Fu Taiwan 9 298 0.9× 82 1.1× 13 1.4× 12 2.4× 5 1.0× 12 301
Jaume Roig Guitart France 5 342 1.1× 29 0.4× 12 1.3× 6 1.2× 2 0.4× 8 347
Vijay Rentala United States 5 161 0.5× 76 1.1× 5 0.6× 4 0.8× 8 1.6× 11 166
Akram Salman United States 11 446 1.4× 49 0.7× 15 1.7× 3 0.6× 12 2.4× 53 453
Biswajit Jena India 13 394 1.3× 111 1.5× 6 0.7× 2 0.4× 2 0.4× 44 408
S. Asgaran Canada 9 344 1.1× 53 0.7× 14 1.6× 8 1.6× 2 0.4× 14 346
Stephen G. Beebe United States 11 316 1.0× 34 0.5× 10 1.1× 2 0.4× 11 2.2× 30 321
R. Tonietto Italy 6 293 0.9× 119 1.7× 14 1.6× 4 0.8× 4 0.8× 8 296

Countries citing papers authored by Heein Yoon

Since Specialization
Citations

This map shows the geographic impact of Heein Yoon's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Heein Yoon with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Heein Yoon more than expected).

Fields of papers citing papers by Heein Yoon

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Heein Yoon. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Heein Yoon. The network helps show where Heein Yoon may publish in the future.

Co-authorship network of co-authors of Heein Yoon

This figure shows the co-authorship network connecting the top 25 collaborators of Heein Yoon. A scholar is included among the top collaborators of Heein Yoon based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Heein Yoon. Heein Yoon is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

17 of 17 papers shown
1.
Yoon, Heein, et al.. (2025). A Multibit ReRAM Computing-in-Memory Processor With Adaptive Decision Level Nonlinear ADC for Ultra-Low-Energy Keyword Spotting in Mobile Devices. IEEE Transactions on Circuits and Systems I Regular Papers. 73(2). 862–874.
2.
Lee, Sangyeol, et al.. (2025). A Low-Jitter and Wide-Frequency-Range D-Band Frequency Synthesizer With a Subsampling PLL and a Harmonic-Boosting Frequency Multiplier. IEEE Journal of Solid-State Circuits. 60(5). 1632–1643. 1 indexed citations
3.
Lim, Younghyun, et al.. (2024). An Area-Efficient CMOS Cross-Coupled LC -VCO Using Nested Intertwined Tail Inductors. IEEE Transactions on Circuits & Systems II Express Briefs. 72(1). 143–147.
4.
Yoo, Seyeon, et al.. (2021). 23.4 An 82fsrms-Jitter and 22.5mW-Power, 102GHz W-Band PLL Using a Power-Gating Injection-Locked Frequency-Multiplier-Based Phase Detector in 65nm CMOS. Scholarworks@UNIST (Ulsan National Institute of Science and Technology). 330–332. 16 indexed citations
5.
Lim, Younghyun, Juyeop Kim, Yongwoo Jo, et al.. (2020). 17.8 A 170MHz-Lock-In-Range and −253dB-FoMjitter 12-to-14.5GHz Subsampling PLL with a 150µW Frequency-Disturbance-Correcting Loop Using a Low-Power Unevenly Spaced Edge Generator. Scholarworks@UNIST (Ulsan National Institute of Science and Technology). 280–282. 11 indexed citations
6.
Kim, Juyeop, Younghyun Lim, Heein Yoon, et al.. (2019). An Ultra-Low-Jitter, mmW-Band Frequency Synthesizer Based on Digital Subsampling PLL Using Optimally Spaced Voltage Comparators. IEEE Journal of Solid-State Circuits. 54(12). 3466–3477. 36 indexed citations
7.
Yoon, Heein, et al.. (2019). A Low-Jitter Injection-Locked Multi-Frequency Generator Using Digitally Controlled Oscillators and Time-Interleaved Calibration. IEEE Journal of Solid-State Circuits. 54(6). 1564–1574. 7 indexed citations
8.
Kim, Juyeop, Heein Yoon, Younghyun Lim, et al.. (2019). 16.2 A 76fs<inf>rms</inf> Jitter and –40dBc Integrated-Phase-Noise 28-to-31GHz Frequency Synthesizer Based on Digital Sub-Sampling PLL Using Optimally Spaced Voltage Comparators and Background Loop-Gain Optimization. Scholarworks@UNIST (Ulsan National Institute of Science and Technology). 258–260. 49 indexed citations
9.
Yoo, Seyeon, et al.. (2018). Injection-locked frequency multiplier with a continuous frequency-tracking loop for 5G transceivers. Asia and South Pacific Design Automation Conference. 303–304. 1 indexed citations
10.
11.
Yoo, Seyeon, et al.. (2018). Injection-locked frequency multiplier with a continuous frequency-tracking loop for 5G transceivers. Scholarworks@UNIST (Ulsan National Institute of Science and Technology). 303–304. 1 indexed citations
12.
Yoon, Heein, et al.. (2017). An ultra-low phase noise all-digital multi-frequency generator using injection-locked DCOs and time-interleaved calibration. Scholarworks@UNIST (Ulsan National Institute of Science and Technology). 51. 329–332. 1 indexed citations
13.
14.
Yoo, Seyeon, et al.. (2017). A Low-Integrated-Phase-Noise 27–30-GHz Injection-Locked Frequency Multiplier With an Ultra-Low-Power Frequency-Tracking Loop for mm-Wave-Band 5G Transceivers. IEEE Journal of Solid-State Circuits. 53(2). 375–388. 55 indexed citations
15.
Yoon, Heein, Yongsun Lee, Younghyun Lim, et al.. (2016). A 0.56–2.92 GHz Wideband and Low Phase Noise Quadrature LO-Generator Using a Single LC-VCO for 2G–4G Multistandard Cellular Transceivers. IEEE Journal of Solid-State Circuits. 51(3). 614–625. 25 indexed citations
16.
Lee, Yongsun, Heein Yoon, Mina Kim, & Jaehyouk Choi. (2016). A PVT-robust −59-dBc reference spur and 450-fs<inf>RMS</inf> jitter injection-locked clock multiplier using a voltage-domain period-calibrating loop. Scholarworks@UNIST (Ulsan National Institute of Science and Technology). 44. 1–2. 14 indexed citations
17.
Yoon, Heein, Yongsun Lee, Jae Joon Kim, & Jaehyouk Choi. (2014). A Wideband Dual-Mode $LC$-VCO With a Switchable Gate-Biased Active Core. IEEE Transactions on Circuits & Systems II Express Briefs. 61(5). 289–293. 30 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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