Serge Vernalde

2.9k citations

50 papers · 1.4k indexed · h-index 18

Impact in

Hardware and Architecture top 0.5%
- Embedded Systems Design Techniques
- Parallel Computing and Optimization Techniques
- VLSI and Analog Circuit Testing
Computer Networks and Communications top 1%
- Interconnection Networks and Systems

Papers in

Hardware and Architecture 40
- Embedded Systems Design Techniques 40
- Parallel Computing and Optimization Techniques 22
- Real-Time Systems Scheduling 7
Computer Networks and Communications 30
- Interconnection Networks and Systems 30

Co-authors: Diederik Verkest Rudy Lauwereins Patrick Schaumont Bingfeng Mei I. Bolsens H. De Man V. Nollet J.-Y. Mignolet
Journals: IEEE Journal of Solid-State Circuits (1 paper)IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (1 paper)Lecture notes in computer science (2 papers)IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences (1 paper)The Journal of Supercomputing (1 paper)
Partner nations: Belgium Slovakia Spain

In The Last Decade

Serge Vernalde

48 papers receiving 1.3k citations

Peers

Countries citing papers authored by Serge Vernalde

Since Specialization

Citations

This map shows the geographic impact of Serge Vernalde's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Serge Vernalde with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Serge Vernalde more than expected).

Fields of papers citing papers by Serge Vernalde

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Serge Vernalde. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Serge Vernalde. The network helps show where Serge Vernalde may publish in the future.

Co-authorship network

The 25 scholars most cited alongside Serge Vernalde, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with Serge Vernalde Line = papers co-authored together Serge Vernalde links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

#	Work
1	Development of a Design Framework for Platform-Independent Networked Reconfiguration of Software and Hardware Yajun Ha, Bingfeng Mei, Patrick Schaumont, Serge Vernalde, Rudy Lauwereins, H. De Man	2007	0
2	Interconnect architectures for modulo-scheduled coarse-grained reconfigurable arrays Steven J. E. Wilton, Evgeny Kruglov, Bingfeng Mei, Serge Vernalde	2005	5
3	Field-Programmable Logic and Applications 14th International Conference, Fpl 2004, Antwerp, Belgium, August 30-September 1, 2004 : Proceedings Springer eBooks ·Jürgen Becker, Marco Platzner, Serge Vernalde	2004	2
4	Design methodology for a tightly coupled VLIW/reconfigurable matrix architecture: a case study Design, Automation, and Test in Europe ·Bingfeng Mei, Serge Vernalde, Diederik Verkest, Rudy Lauwereins	2004	100
5	Run-time support for heterogeneous multitasking on reconfigurable SoCs Integration ·T. Marescaux, V. Nollet, J.-Y. Mignolet, Andrei Bartic, Wenhui Zeng, Prabhat Avasare, J. Hoja G. Lentka, Diederik Verkest, Serge Vernalde, Rudy Lauwereins	2004	27
6	Operating-system controlled network on chip V. Nollet, T. Marescaux, Diederik Verkest, J.-Y. Mignolet, Serge Vernalde	2004	63
7	A FRAMEWORK FOR MAPPING SCALABLE NETWORKED MULTIMEDIA APPLICATIONS ON RUN-TIME RECONFIGURABLE PLATFORMS Nam Pham Ngoc, Gauthier Lafruit, 淳寺田, Serge Vernalde, Geert Deconinck, Rudy Lauwereins	2003	2
8	ADRES: an architecture with tightly coupled VLIW processor and coarse-grained reconfigurable Matrix Lecture notes in computer science ·Bingfeng Mei, Serge Vernalde, Diederik Verkest, Hugo De Man, Rudy Lauwereins	2003	3
9	Exploiting loop-level parallelism on coarse-grained reconfigurable architectures using modulo scheduling 2003 Design, Automation and Test in Europe Conference and Exhibition ·Bingfeng Mei, Serge Vernalde, Diederik Verkest, H. De Man, Rudy Lauwereins	2003	94
10	DRESC: a retargetable compiler for coarse-grained reconfigurable architectures Bingfeng Mei, Serge Vernalde, Diederik Verkest, H. De Man, Rudy Lauwereins	2003	139
11	Real-time 3D applications on mobile platforms with run-time reconfigurable hardware accelerator Nam Pham Ngoc, Gauthier Lafruit, 淳寺田, Serge Vernalde, Geert Deconinck, Rudy Lauwereins	2002	1
12	Enabling hardware-software multitasking on a reconfigurable computing platform for networked portable multimedia appliances J.-Y. Mignolet, Serge Vernalde, Diederik Verkest, Rudy Lauwereins	2002	32
13	A Hilbert fractal codec for region oriented compression of color images J. Bormans, Serge Vernalde, Jan Cornelis, I. Bolsens, Muteber Burunsuz	2002	0
14	Digital upconversion architecture for quadrature modulators Patrick Schaumont, Serge Vernalde, M. Engels, I. Bolsens	2002	2
15	Functional verification of an embedded network component by co-simulation with a real network José Antonio Riquelme Cantal, 石田時也, Patrick Schaumont, Serge Vernalde	2002	7
16	A hardware virtual machine for networked reconfiguration Yajun Ha, Patrick Schaumont, M. Engels, Serge Vernalde, Al Patiño, BLESSING OKOROMA ELEBACHI, H. De Man	2002	10
17	Design and optimization of dynamically reconfigurable embedded systems Bingfeng Mei, Serge Vernalde, Hugo De Man, Rudy Lauwereins	2001	2
18	High Level Analysis of Clock Regions in A C++ System Description IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences ·Álvaro Francisco Fernandes Neto, Patrick Schaumont, Serge Vernalde, I. Bolsens	2000	2
19	A scalable architecture to support networked reconfiguration Yajun Ha, Patrick Schaumont, BLESSING OKOROMA ELEBACHI, Serge Vernalde, M. Engels, Hugo De Man	1999	4
20	Synthesis of multi-rate and variable rate circuits for high speed telecommunications applications Patrick Schaumont, Serge Vernalde, BLESSING OKOROMA ELEBACHI, M. Engels, I. Bolsens	1997	6

About Serge Vernalde

Serge Vernalde is a scholar working on Hardware and Architecture, Computer Networks and Communications, Signal Processing, Computer Graphics and Computer-Aided Design and Electrical and Electronic Engineering, having authored 50 papers that have together received 1.4k indexed citations. Recurring topics across this work include Embedded Systems Design Techniques (40 papers), Interconnection Networks and Systems (30 papers), Parallel Computing and Optimization Techniques (22 papers), Real-Time Systems Scheduling (7 papers), Advancements in PLL and VCO Technologies (7 papers), Digital Filter Design and Implementation (6 papers), Analog and Mixed-Signal Circuit Design (5 papers) and VLSI and FPGA Design Techniques (4 papers). The work is most often cited by research in Hardware and Architecture (1.0k citations), Computer Networks and Communications (827 citations), Signal Processing (278 citations), Computational Theory and Mathematics (209 citations) and Electrical and Electronic Engineering (405 citations). Serge Vernalde has collaborated with scholars based in Belgium, Slovakia and Spain. Frequent co-authors include Diederik Verkest, Rudy Lauwereins, Patrick Schaumont, Bingfeng Mei, I. Bolsens, H. De Man, V. Nollet, J.-Y. Mignolet, Veerle Derudder and M. Engels. Their work appears in journals such as IEEE Journal of Solid-State Circuits, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Lecture notes in computer science, IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences and The Journal of Supercomputing.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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