Răzvan Nane

843 total citations · 1 hit paper
20 papers, 547 citations indexed

About

Răzvan Nane is a scholar working on Hardware and Architecture, Computer Networks and Communications and Electrical and Electronic Engineering. According to data from OpenAlex, Răzvan Nane has authored 20 papers receiving a total of 547 indexed citations (citations by other indexed papers that have themselves been cited), including 13 papers in Hardware and Architecture, 9 papers in Computer Networks and Communications and 7 papers in Electrical and Electronic Engineering. Recurrent topics in Răzvan Nane's work include Parallel Computing and Optimization Techniques (10 papers), Embedded Systems Design Techniques (9 papers) and Interconnection Networks and Systems (6 papers). Răzvan Nane is often cited by papers focused on Parallel Computing and Optimization Techniques (10 papers), Embedded Systems Design Techniques (9 papers) and Interconnection Networks and Systems (6 papers). Răzvan Nane collaborates with scholars based in Netherlands, United States and Portugal. Răzvan Nane's co-authors include Koen Bertels, Vlad-Mihai Sima, Christian Pilato, Blair Fort, Fabrizio Ferrandi, Yu Ting Chen, Jongsok Choi, Jason H. Anderson, Andrew Canis and Hsuan Hsiao and has published in prestigious journals such as IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on Very Large Scale Integration (VLSI) Systems and IEEE Transactions on Emerging Topics in Computing.

In The Last Decade

Răzvan Nane

20 papers receiving 532 citations

Hit Papers

A Survey and Evaluation of FPGA High-Level Synthesis Tools 2015 2026 2018 2022 2015 100 200 300
What are hit papers?

Hit papers significantly outperform the citation benchmark for their cohort. A paper qualifies if it has ≥500 total citations, achieves ≥1.5× the top-1% citation threshold for papers in the same subfield and year (this is the minimum needed to enter the top 1%, not the average within it), or reaches the top citation threshold in at least one of its specific research topics.

  1. A Survey and Evaluation of FPGA High-Level Synthesis Tools
    2015 342 citations Răzvan Nane, Vlad-Mihai Sima et al. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems profile →

Peers — A (Enhanced Table)

Peers by citation overlap · career bar shows stage (early→late) cites · hero ref

Name h Career Trend Papers Cites
Răzvan Nane Netherlands 9 345 229 176 104 39 20 547
Mahdi Nazm Bojnordi United States 12 199 0.6× 364 1.6× 169 1.0× 118 1.1× 26 0.7× 42 529
Amin Farmahini-Farahani United States 12 270 0.8× 225 1.0× 266 1.5× 139 1.3× 8 0.2× 27 532
Pascal Benoit France 17 446 1.3× 353 1.5× 346 2.0× 153 1.5× 13 0.3× 104 781
Hsuan Hsiao Canada 7 304 0.9× 205 0.9× 177 1.0× 74 0.7× 10 0.3× 12 460
Chengmo Yang United States 16 545 1.6× 489 2.1× 490 2.8× 148 1.4× 44 1.1× 100 886
Mario Barbareschi Italy 14 308 0.9× 345 1.5× 75 0.4× 101 1.0× 80 2.1× 63 512
Stephan Wong Netherlands 15 658 1.9× 312 1.4× 490 2.8× 83 0.8× 20 0.5× 105 1.0k
Naghmeh Karimi United States 14 476 1.4× 517 2.3× 141 0.8× 168 1.6× 103 2.6× 77 730
Qiaoyan Yu United States 18 539 1.6× 597 2.6× 274 1.6× 217 2.1× 175 4.5× 96 856
Weixia Xu China 12 89 0.3× 221 1.0× 119 0.7× 141 1.4× 45 1.2× 68 439

Countries citing papers authored by Răzvan Nane

Since Specialization
Citations

This map shows the geographic impact of Răzvan Nane's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Răzvan Nane with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Răzvan Nane more than expected).

Fields of papers citing papers by Răzvan Nane

Since Specialization
Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Răzvan Nane. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Răzvan Nane. The network helps show where Răzvan Nane may publish in the future.

Co-authorship network of co-authors of Răzvan Nane

This figure shows the co-authorship network connecting the top 25 collaborators of Răzvan Nane. A scholar is included among the top collaborators of Răzvan Nane based on the total number of citations received by their joint publications. Widths of edges represent the number of papers authors have co-authored together. Node borders signify the number of papers an author published with Răzvan Nane. Răzvan Nane is excluded from the visualization to improve readability, since they are connected to all nodes in the network.

All Works

20 of 20 papers shown
1.
Nane, Răzvan, et al.. (2021). Hardware Acceleration of High-Performance Computational Flow Dynamics Using High-Bandwidth Memory-Enabled Field-Programmable Gate Arrays. ACM Transactions on Reconfigurable Technology and Systems. 15(2). 1–35. 1 indexed citations
2.
Ashraf, Imran, et al.. (2021). OpenQL: A Portable Quantum Programming Framework for Quantum Accelerators. ACM Journal on Emerging Technologies in Computing Systems. 18(1). 1–24. 37 indexed citations
3.
4.
Yu, Jintao, Răzvan Nane, Imran Ashraf, et al.. (2017). Skeleton-Based Synthesis Flow for Computation-in-Memory Architectures. IEEE Transactions on Emerging Topics in Computing. 8(2). 545–558. 3 indexed citations
5.
Nguyen, Hoang Anh Du, Lei Xie, Mottaqiallah Taouil, et al.. (2017). On the Implementation of Computation-in-Memory Parallel Adder. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25(8). 2206–2219. 26 indexed citations
6.
Yu, Jintao, et al.. (2017). A Domain-Specific Language and Compiler for Computation-in-Memory Skeletons. 71–76. 2 indexed citations
7.
Yu, Jintao, et al.. (2016). Skeleton-based design and simulation flow for Computation-in-Memory architectures. TU/e Research Portal. 6 indexed citations
8.
Nane, Răzvan, et al.. (2016). An Image Processing VLIW Architecture for Real-Time Depth Detection. 158–165. 4 indexed citations
9.
Yu, Jintao, et al.. (2016). Parallel matrix multiplication on memristor-based computation-in-memory architecture. Data Archiving and Networked Services (DANS). 759–766. 19 indexed citations
10.
Nane, Răzvan, Vlad-Mihai Sima, Christian Pilato, et al.. (2015). A Survey and Evaluation of FPGA High-Level Synthesis Tools. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 35(10). 1591–1604. 342 indexed citations breakdown →
11.
Nguyen, Hoang Anh Du, Lei Xie, Mottaqiallah Taouil, et al.. (2015). Computation-in-memory based parallel adder. 57–62. 19 indexed citations
12.
Nane, Răzvan, et al.. (2015). Low-Cost Software Control-Flow Error Recovery. Chalmers Research (Chalmers University of Technology). 8153. 510–517. 2 indexed citations
13.
Nane, Răzvan. (2014). Automatic Hardware Generation for Reconfigurable Architectures. Research Repository (Delft University of Technology). 1 indexed citations
14.
Nane, Răzvan, et al.. (2014). High-Level Synthesis in the Delft Workbench Hardware/Software Co-design Tool-Chain. 138–145. 10 indexed citations
15.
Cardoso, João M. P., José G. F. Coutinho, Ricardo Nobre, et al.. (2013). Controlling a complete hardware synthesis toolchain with LARA aspects. Microprocessors and Microsystems. 37(8). 1073–1089. 9 indexed citations
16.
Galuzzi, Carlo, et al.. (2013). Quipu. ACM Transactions on Reconfigurable Technology and Systems. 6(1). 1–25. 2 indexed citations
17.
Nane, Răzvan, Vlad-Mihai Sima, & Koen Bertels. (2012). Area constraint propagation in high level synthesis. 1. 247–252. 1 indexed citations
18.
Nane, Răzvan, et al.. (2012). DWARV 2.0: A CoSy-based C-to-VHDL hardware compiler. 619–622. 50 indexed citations
19.
Nane, Răzvan, Vlad-Mihai Sima, & Koen Bertels. (2012). A lightweight speculative and predicative scheme for hardware execution. 1–6. 1 indexed citations
20.
Nane, Răzvan, et al.. (2011). IP-XACT extensions for Reconfigurable Computing. 2007. 215–218. 1 indexed citations

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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