Andrew Canis

1.9k citations

19 papers · 1.3k indexed · 2 hit papers · h-index 13

Impact in

Hardware and Architecture top 0.5%
- Embedded Systems Design Techniques
- Parallel Computing and Optimization Techniques
- VLSI and Analog Circuit Testing
Computer Networks and Communications top 2%
- Interconnection Networks and Systems

Papers in

Hardware and Architecture 19
- Embedded Systems Design Techniques 17
- Parallel Computing and Optimization Techniques 16
- VLSI and Analog Circuit Testing 3
- Real-Time Systems Scheduling 2
Computer Networks and Communications 9
- Interconnection Networks and Systems 9

Co-authors: Jason H. Anderson Stephen D. Brown Jongsok Choi Tomasz Czajkowski Victor Zhang Blair Fort Yu Ting Chen Răzvan Nane
Journals: ACM Transactions on Reconfigurable Technology and Systems (1 paper)ACM Transactions on Embedded Computing Systems (1 paper)IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (1 paper)Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015 (1 paper)Design, Automation, and Test in Europe (2 papers)
Partner nations: Canada Japan Netherlands

In The Last Decade

Andrew Canis

19 papers receiving 1.2k citations

Hit Papers

align trajectories log scale

A Survey and Evaluation of FPGA High-Level Synthesis Tools 2015 · 342 citations

What are hit papers?

Hit papers significantly outperform the citation benchmark for their cohort. A paper qualifies if any of the following hold:

it has ≥500 total citations;
it reaches ≥1.5× the top-1% citation threshold for papers in the same subfield and year (the threshold is the minimum needed to enter the top 1%, not the average within it);
it reaches the top citation threshold in at least one of its specific research topics.

2015 IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2011 LegUp

Peers

Countries citing papers authored by Andrew Canis

Since Specialization

Citations

This map shows the geographic impact of Andrew Canis's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by Andrew Canis with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites Andrew Canis more than expected).

Fields of papers citing papers by Andrew Canis

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by Andrew Canis. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by Andrew Canis. The network helps show where Andrew Canis may publish in the future.

Co-authors

The 21 scholars most cited alongside Andrew Canis, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with Andrew Canis Line = papers co-authored together Andrew Canis links everyone, so they are left out of the graph.

All Works

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19 of 19 papers shown

#	Work
1	Accelerating Memcached on AWS Cloud FPGAs Jongsok Choi, Aynaz Davari, Zhi Li, Andrew Canis, Neil Illingworth	2018	11
2	Profiling-driven multi-cycling in FPGA high-level synthesis Design, Automation, and Test in Europe ·Stefan Hadjis, Andrew Canis, Mary Agnel, Yuko Hara–Azumi, Hiroyuki Tomiyama, Jason H. Anderson	2015	5
3	A Survey and Evaluation of FPGA High-Level Synthesis Tools IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ·Răzvan Nane, Vlad-Mihai Sima, Christian Pilato, Jongsok Choi, Blair Fort, Andrew Canis, Yu Ting Chen, Hsuan Hsiao, Stephen D. Brown, Fabrizio Ferrandi, Jason H. Anderson, Koen Bertels Hit paper breakdown →	2015	342
4	Profiling-Driven Multi-Cycling in FPGA High-Level Synthesis Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015 ·Stefan Hadjis, Andrew Canis, Mary Agnel, Yuko Hara–Azumi, Hiroyuki Tomiyama, Kenny Gannon	2015	5
5	The Effect of Compiler Optimizations on High-Level Synthesis-Generated Hardware ACM Transactions on Reconfigurable Technology and Systems ·Qijing Huang, Aynaz Davari, Andrew Canis, Jongsok Choi, Ntalia A. Coss, Halim Choi, Stephen D. Brown, Jason H. Anderson	2015	20
6	Modulo SDC scheduling with recurrence minimization in high-level synthesis Andrew Canis, Stephen D. Brown, Jason H. Anderson	2014	59
7	Automating the Design of Processor/Accelerator Embedded Systems with LegUp High-Level Synthesis Blair Fort, Andrew Canis, Jongsok Choi, Halim Choi, Aynaz Davari, Stefan Hadjis, Yu Ting Chen, Nikola PŘÍHODOVÁ, Made Putra, Tomasz Czajkowski, Stephen D. Brown, Jason H. Anderson	2014	18
8	From software to accelerators with LegUp high-level synthesis Andrew Canis, Jongsok Choi, Blair Fort, Aynaz Davari, Qijing Huang, Halim Choi, Marcel Gort, Harold Beaver, Seyithan Altaş, Tomasz Czajkowski, Stephen D. Brown, Jason H. Anderson	2013	23
9	Multi-pumping for resource reduction in FPGA high-level synthesis Design, Automation, and Test in Europe ·Andrew Canis, Jason H. Anderson, Stephen D. Brown	2013	20
10	The Effect of Compiler Optimizations on High-Level Synthesis for FPGAs Qijing Huang, Aynaz Davari, Andrew Canis, Jongsok Choi, Ntalia A. Coss, Stephen D. Brown, Jason H. Anderson	2013	40
11	From software to accelerators with LegUp high-level synthesis Andrew Canis, Jongsok Choi, Blair Fort, Aynaz Davari, Qijing Huang, Halim Choi, Marcel Gort, Harold Beaver, Seyithan Altaş, Tomasz Czajkowski, Stephen D. Brown, Jason H. Anderson	2013	32
12	From C to Blokus Duo with LegUp high-level synthesis Jiu Cheng Cai, Aynaz Davari, А. А. Лундин, Andrew Canis, Jongsok Choi, Blair Fort, 陈祥训, Shreyans Amrutlal Amin, Yanyan Zhang, Halim Choi, Stephen D. Brown, Jason H. Anderson	2013	1
13	Multi-Pumping for Resource Reduction in FPGA High-Level Synthesis Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013 ·Andrew Canis, Jason H. Anderson, Stephen D. Brown	2013	21
14	LegUp ACM Transactions on Embedded Computing Systems ·Andrew Canis, Jongsok Choi, Seyithan Altaş, Victor Zhang, D. Cutts, Tomasz Czajkowski, Stephen D. Brown, Jason H. Anderson	2013	207
15	High-level synthesis with LegUp Jason H. Anderson, Stephen D. Brown, Andrew Canis, Jongsok Choi	2013	2
16	Impact of FPGA architecture on resource sharing in high-level synthesis Stefan Hadjis, Andrew Canis, Jason H. Anderson, Jongsok Choi, Kevin Nam, Stephen D. Brown, Tomasz Czajkowski	2012	37
17	Impact of Cache Architecture and Interface on Performance and Area of FPGA-Based Processor/Parallel-Accelerator Systems Jongsok Choi, Kevin Nam, Andrew Canis, Jason H. Anderson, Stephen D. Brown, Tomasz Czajkowski	2012	43
18	Low-cost hardware profiling of run-time and energy in FPGA embedded processors Seyithan Altaş, Jason H. Anderson, Stephen D. Brown, Andrew Canis	2011	12
19	LegUp Andrew Canis, Jongsok Choi, Seyithan Altaş, Victor Zhang, D. Cutts, Jason H. Anderson, Stephen D. Brown, Tomasz Czajkowski Hit paper breakdown →	2011	363

About Andrew Canis

Andrew Canis is a scholar working on Hardware and Architecture, Computer Networks and Communications, Electrical and Electronic Engineering, Information Systems and Artificial Intelligence, having authored 19 papers that have together received 1.3k indexed citations. Recurring topics across this work include Embedded Systems Design Techniques (17 papers), Parallel Computing and Optimization Techniques (16 papers), Interconnection Networks and Systems (9 papers), VLSI and FPGA Design Techniques (4 papers), VLSI and Analog Circuit Testing (3 papers), Real-Time Systems Scheduling (2 papers), Artificial Intelligence in Games (1 paper) and Low-power high-performance VLSI design (1 paper). The work is most often cited by research in Hardware and Architecture (1.1k citations), Computer Networks and Communications (542 citations), Electrical and Electronic Engineering (463 citations), Software (21 citations) and Computer Vision and Pattern Recognition (82 citations). Andrew Canis has collaborated with scholars based in Canada, Japan and Netherlands. Frequent co-authors include Jason H. Anderson, Stephen D. Brown, Jongsok Choi, Tomasz Czajkowski, Victor Zhang, Blair Fort, Yu Ting Chen, Răzvan Nane, Vlad-Mihai Sima and Fabrizio Ferrandi. Their work appears in journals such as ACM Transactions on Reconfigurable Technology and Systems, ACM Transactions on Embedded Computing Systems, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015 and Design, Automation, and Test in Europe.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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