M.-R. Lin

404 citations

20 papers · 268 · h-index 9

Impact in

Electrical and Electronic Engineering
- Semiconductor materials and devices
- Advancements in Semiconductor Devices and Circuit Design
- Integrated Circuits and Semiconductor Failure Analysis
- Ferroelectric and Negative Capacitance Devices
- Low-power high-performance VLSI design
- Silicon Carbide Semiconductor Technologies
Hardware and Architecture

Papers in

Electrical and Electronic Engineering 19
- Semiconductor materials and devices 18
- Advancements in Semiconductor Devices and Circuit Design 18
- Integrated Circuits and Semiconductor Failure Analysis 6
- Ferroelectric and Negative Capacitance Devices 4
- Silicon Carbide Semiconductor Technologies 2
- Thin-Film Transistor Technologies 2
Molecular Biology 1
- Machine Learning in Bioinformatics 1

Co-authors: W. Maszara (8 shared papers)Zoran Krivokapić (6 shared papers)Peng Fang (4 shared papers)P King (2 shared papers)Jung-Suk Goo (3 shared papers)Chenming Hu (1 shared paper)Elyse Rosenbaum (1 shared paper)Victor Moroz (1 shared paper)
Journals: IEEE Electron Device Letters (2 papers)IEEE Transactions on Electron Devices (2 papers)Semiconductor Science and Technology (1 paper)IEEE Transactions on Semiconductor Manufacturing (1 paper)Proteins Structure Function and Bioinformatics (1 paper)
Partner nations: United States Canada

In The Last Decade

M.-R. Lin

19 papers receiving 243 citations

Peers

Countries citing papers authored by M.-R. Lin

Since Specialization

Citations

This map shows the geographic impact of M.-R. Lin's research. It shows the number of citations coming from papers published by authors working in each country. You can also color the map by specialization and compare the number of citations received by M.-R. Lin with the expected number of citations based on a country's size and research output (numbers larger than one mean the country cites M.-R. Lin more than expected).

Fields of papers citing papers by M.-R. Lin

Since Specialization

Physical SciencesHealth SciencesLife SciencesSocial Sciences

This network shows the impact of papers produced by M.-R. Lin. Nodes represent research fields, and links connect fields that are likely to share authors. Colored nodes show fields that tend to cite the papers produced by M.-R. Lin. The network helps show where M.-R. Lin may publish in the future.

Co-authors

The 25 scholars most cited alongside M.-R. Lin, linked wherever they have co-authored with each other. Click a name or a connecting line to browse the papers they share.

Border = papers with M.-R. Lin Line = papers co-authored together M.-R. Lin links everyone, so they are left out of the graph.

All Works

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20 of 20 papers shown

#	Work
1	Transistors with dual work function metal gates by single full silicidation (FUSI) of polysilicon gates W. Maszara, Zoran Krivokapić, P King, Jung-Suk Goo, M.-R. Lin	2003	60
2	Predicting CMOS speed with gate oxide and voltage scaling and interconnect loading effects IEEE Transactions on Electron Devices ·K. Chen, Chenming Hu, Peng Fang, M.-R. Lin, D.L. Wollesen	1997	47
3	Nickel silicide metal gate FDSOI devices with improved gate oxide leakage Zoran Krivokapić, W. Maszara, K. Achutan, P King, Jordan Gray, M. Sidorow, E. Zhao, J. Zhang, J. Chan, A. Marathe, M.-R. Lin	2003	29
4	Hot carrier effects in nMOSFETs in 0.1 μm CMOS technology E. Li, Elyse Rosenbaum, J. Tao, G.C.-F. Yeap, M.-R. Lin, Peng Fang	2003	27
5	FinFETs - Technology and circuit design challenges W. Maszara, M.-R. Lin	2013	19
6	Locally strained ultra-thin channel 25nm narrow FDSOI devices with metal gate and mesa isolation Zoran Krivokapić, Victor Moroz, W. Maszara, M.-R. Lin	2004	14
7	Characterization and optimization of metal etch processes to minimize charging damage to submicron transistor gate oxide IEEE Electron Device Letters ·M.-R. Lin, Peng Fang, F.P. Heiler, R. Lee, R. Rakkhit, Lei Shen	1994	11
8	High performance 25 nm FDSOI devices with extremely thin silicon channel Zoran Krivokapić, W. Maszara, F. Arasnia, Eric Paton, Y. Kim, L. Washington, E. Zhao, J. Chan, J. Zhang, A. Marathe, M.-R. Lin	2004	11
9	The Effect of Annealing Temperatures on Self-Aligned Replacement (Damascene) TaCN–TaN-Stacked Gate pMOSFETs IEEE Transactions on Electron Devices ·James N. Pan, C. Woo, Madison Ngo, Jin Xie, Dai Matsumoto, Deepthi Murthy T S, Jung-Suk Goo, Qian Xiang, M.-R. Lin	2004	9
10	High Performance 45nm CMOS Technology with 20nm Multi-Gate Devices Zoran Krivokapić, Cyrus Tabery, W. Maszara, Qian Xiang, M.-R. Lin	2003	8
11	Manufacturability of 20-nm Ultrathin Body Fully Depleted SOI Devices With FUSI Metal Gates IEEE Transactions on Semiconductor Manufacturing ·Zoran Krivokapić, W. Maszara, M.-R. Lin	2005	7
12	Impact of Ceramic Packaging Anneal on the Reliability of Al Interconnects Reliability physics ·M.-R. Lin, J.T. Yue	1986	6
13	FinFETs — Technology and circuit design challenges W. Maszara, M.-R. Lin	2013	6
14	Sub-100 nm nMOSFETs with direct tunneling thermal, nitrous and nitric oxides Geoffrey Yeap, Qian Xiang, Miryeong Song, Khaled Ahmed, D.S. Bang, E. Ibok, M.-R. Lin	2002	4
15	CVD Rhenium and PVD Tantalum Gate MOSFETs Fabricated With a Replacement Technique IEEE Electron Device Letters ·James N. Pan, D. Canaperi, R. Jammy, M. Steen, John Pellerin, M.-R. Lin	2004	3
16	Experimental studies on deep submicron CMOS scaling Semiconductor Science and Technology ·K Chen, C. Hu, Peng Fang, Aniket Gupta, M.-R. Lin, D.L. Wollesen	1998	3
17	Polarity dependent reliability of advanced MOSFET using MOCVD nitrided Hf-silicate high-k gate dielectric J. Zhang, E. Zhao, Qian Xiang, J. Chan, J. Jeon, Jung-Suk Goo, A. Marathe, B. Ogle, M.-R. Lin, K. Taylor	2003	2
18	DisDock : A Deep Learning Method for Metal Ion‐Protein Redocking Proteins Structure Function and Bioinformatics ·M.-R. Lin, Keqiao Li, Yuan Zhang, Feng Pan, Wei Wu, Jinfeng Zhang	2025	1
19	Novel Approach to Reduce Source/Drain Series Resistance in High Performance CMOS Devices Using Self-Aligned CoWP Process for 45nm Node UTSOI Transistors with 20nm Gate Length Jie Pan, Anna W. Topol, I. Shao, Damyanti Singh, Zhong Ren, C.Y. Sung, M. Ieong, John Pellerin, J. Iacoponi, M.-R. Lin	2006	1
20	Implications of gate stack scaling in sub-100 nm CMOS speed and reliability Geoffrey Yeap, S. Krishnan, Bin Yu, Qian Xiang, M.-R. Lin	2002	0

About M.-R. Lin

M.-R. Lin is a scholar working on Electrical and Electronic Engineering, Molecular Biology, Mechanics of Materials, Atomic and Molecular Physics, and Optics and Computational Theory and Mathematics, having authored 20 papers that have together received 268 indexed citations. Recurring topics across this work include Semiconductor materials and devices (18 papers), Advancements in Semiconductor Devices and Circuit Design (18 papers), Integrated Circuits and Semiconductor Failure Analysis (6 papers), Ferroelectric and Negative Capacitance Devices (4 papers), Silicon Carbide Semiconductor Technologies (2 papers), Thin-Film Transistor Technologies (2 papers), Semiconductor materials and interfaces (1 paper) and Machine Learning in Bioinformatics (1 paper). The work is most often cited by research in Electrical and Electronic Engineering (258 citations), Hardware and Architecture (12 citations), Atomic and Molecular Physics, and Optics (53 citations), Electronic, Optical and Magnetic Materials (14 citations) and Ceramics and Composites (4 citations). M.-R. Lin has collaborated with scholars based in United States and Canada. Frequent co-authors include W. Maszara, Zoran Krivokapić, Peng Fang, P King, Jung-Suk Goo, Chenming Hu, Elyse Rosenbaum, Victor Moroz, A. Marathe and Jordan Gray. Their work appears in journals such as IEEE Electron Device Letters, IEEE Transactions on Electron Devices, Semiconductor Science and Technology, IEEE Transactions on Semiconductor Manufacturing and Proteins Structure Function and Bioinformatics.

Rankless uses publication and citation data sourced from OpenAlex, an open and comprehensive bibliographic database. While OpenAlex provides broad and valuable coverage of the global research landscape, it—like all bibliographic datasets—has inherent limitations. These include incomplete records, variations in author disambiguation, differences in journal indexing, and delays in data updates. As a result, some metrics and network relationships displayed in Rankless may not fully capture the entirety of a scholar's output or impact.

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